arch/arm/mach-omap1/board-h3.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-h3.c
   3  *
   4  * This file contains OMAP1710 H3 specific code.
   5  *
   6  * Copyright (C) 2004 Texas Instruments, Inc.
   7  * Copyright (C) 2002 MontaVista Software, Inc.
   8  * Copyright (C) 2001 RidgeRun, Inc.
   9  * Author: RidgeRun, Inc.
  10  *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/init.h>
  19 #include <linux/major.h>
  20 #include <linux/kernel.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/errno.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/i2c.h>
  25 #include <linux/mtd/mtd.h>
  26 #include <linux/mtd/nand.h>
  27 #include <linux/mtd/partitions.h>
  28 #include <linux/mtd/physmap.h>
  29 #include <linux/input.h>
  30 #include <linux/spi/spi.h>
  31 #include <linux/i2c/tps65010.h>
  32 #include <linux/smc91x.h>
  33
  34 #include <asm/setup.h>
  35 #include <asm/page.h>
  36 #include <mach/hardware.h>
  37 #include <asm/gpio.h>
  38
  39 #include <asm/mach-types.h>
  40 #include <asm/mach/arch.h>
  41 #include <asm/mach/map.h>
  42
  43 #include <mach/irqs.h>
  44 #include <plat/mux.h>
  45 #include <plat/tc.h>
  46 #include <plat/usb.h>
  47 #include <plat/keypad.h>
  48 #include <plat/dma.h>
  49 #include <plat/common.h>
  50 #include <plat/flash.h>
  51
  52 #include "board-h3.h"
  53
  54 /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
  55 #define OMAP1710_ETHR_START             0x04000300
  56
  57 #define H3_TS_GPIO      48
  58
  59 static int h3_keymap[] = {
  60         KEY(0, 0, KEY_LEFT),
  61         KEY(0, 1, KEY_RIGHT),
  62         KEY(0, 2, KEY_3),
  63         KEY(0, 3, KEY_F10),
  64         KEY(0, 4, KEY_F5),
  65         KEY(0, 5, KEY_9),
  66         KEY(1, 0, KEY_DOWN),
  67         KEY(1, 1, KEY_UP),
  68         KEY(1, 2, KEY_2),
  69         KEY(1, 3, KEY_F9),
  70         KEY(1, 4, KEY_F7),
  71         KEY(1, 5, KEY_0),
  72         KEY(2, 0, KEY_ENTER),
  73         KEY(2, 1, KEY_6),
  74         KEY(2, 2, KEY_1),
  75         KEY(2, 3, KEY_F2),
  76         KEY(2, 4, KEY_F6),
  77         KEY(2, 5, KEY_HOME),
  78         KEY(3, 0, KEY_8),
  79         KEY(3, 1, KEY_5),
  80         KEY(3, 2, KEY_F12),
  81         KEY(3, 3, KEY_F3),
  82         KEY(3, 4, KEY_F8),
  83         KEY(3, 5, KEY_END),
  84         KEY(4, 0, KEY_7),
  85         KEY(4, 1, KEY_4),
  86         KEY(4, 2, KEY_F11),
  87         KEY(4, 3, KEY_F1),
  88         KEY(4, 4, KEY_F4),
  89         KEY(4, 5, KEY_ESC),
  90         KEY(5, 0, KEY_F13),
  91         KEY(5, 1, KEY_F14),
  92         KEY(5, 2, KEY_F15),
  93         KEY(5, 3, KEY_F16),
  94         KEY(5, 4, KEY_SLEEP),
  95         0
  96 };
  97
  98
  99 static struct mtd_partition nor_partitions[] = {
 100         /* bootloader (U-Boot, etc) in first sector */
 101         {
 102               .name             = "bootloader",
 103               .offset           = 0,
 104               .size             = SZ_128K,
 105               .mask_flags       = MTD_WRITEABLE, /* force read-only */
 106         },
 107         /* bootloader params in the next sector */
 108         {
 109               .name             = "params",
 110               .offset           = MTDPART_OFS_APPEND,
 111               .size             = SZ_128K,
 112               .mask_flags       = 0,
 113         },
 114         /* kernel */
 115         {
 116               .name             = "kernel",
 117               .offset           = MTDPART_OFS_APPEND,
 118               .size             = SZ_2M,
 119               .mask_flags       = 0
 120         },
 121         /* file system */
 122         {
 123               .name             = "filesystem",
 124               .offset           = MTDPART_OFS_APPEND,
 125               .size             = MTDPART_SIZ_FULL,
 126               .mask_flags       = 0
 127         }
 128 };
 129
 130 static struct physmap_flash_data nor_data = {
 131         .width          = 2,
 132         .set_vpp        = omap1_set_vpp,
 133         .parts          = nor_partitions,
 134         .nr_parts       = ARRAY_SIZE(nor_partitions),
 135 };
 136
 137 static struct resource nor_resource = {
 138         /* This is on CS3, wherever it's mapped */
 139         .flags          = IORESOURCE_MEM,
 140 };
 141
 142 static struct platform_device nor_device = {
 143         .name           = "physmap-flash",
 144         .id             = 0,
 145         .dev            = {
 146                 .platform_data  = &nor_data,
 147         },
 148         .num_resources  = 1,
 149         .resource       = &nor_resource,
 150 };
 151
 152 static struct mtd_partition nand_partitions[] = {
 153 #if 0
 154         /* REVISIT: enable these partitions if you make NAND BOOT work */
 155         {
 156                 .name           = "xloader",
 157                 .offset         = 0,
 158                 .size           = 64 * 1024,
 159                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 160         },
 161         {
 162                 .name           = "bootloader",
 163                 .offset         = MTDPART_OFS_APPEND,
 164                 .size           = 256 * 1024,
 165                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 166         },
 167         {
 168                 .name           = "params",
 169                 .offset         = MTDPART_OFS_APPEND,
 170                 .size           = 192 * 1024,
 171         },
 172         {
 173                 .name           = "kernel",
 174                 .offset         = MTDPART_OFS_APPEND,
 175                 .size           = 2 * SZ_1M,
 176         },
 177 #endif
 178         {
 179                 .name           = "filesystem",
 180                 .size           = MTDPART_SIZ_FULL,
 181                 .offset         = MTDPART_OFS_APPEND,
 182         },
 183 };
 184
 185 static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 186 {
 187         struct nand_chip *this = mtd->priv;
 188         unsigned long mask;
 189
 190         if (cmd == NAND_CMD_NONE)
 191                 return;
 192
 193         mask = (ctrl & NAND_CLE) ? 0x02 : 0;
 194         if (ctrl & NAND_ALE)
 195                 mask |= 0x04;
 196         writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
 197 }
 198
 199 #define H3_NAND_RB_GPIO_PIN     10
 200
 201 static int nand_dev_ready(struct mtd_info *mtd)
 202 {
 203         return gpio_get_value(H3_NAND_RB_GPIO_PIN);
 204 }
 205
 206 static const char *part_probes[] = { "cmdlinepart", NULL };
 207
 208 struct platform_nand_data nand_platdata = {
 209         .chip   = {
 210                 .nr_chips               = 1,
 211                 .chip_offset            = 0,
 212                 .nr_partitions          = ARRAY_SIZE(nand_partitions),
 213                 .partitions             = nand_partitions,
 214                 .options                = NAND_SAMSUNG_LP_OPTIONS,
 215                 .part_probe_types       = part_probes,
 216         },
 217         .ctrl   = {
 218                 .cmd_ctrl       = nand_cmd_ctl,
 219                 .dev_ready      = nand_dev_ready,
 220
 221         },
 222 };
 223
 224 static struct resource nand_resource = {
 225         .flags          = IORESOURCE_MEM,
 226 };
 227
 228 static struct platform_device nand_device = {
 229         .name           = "gen_nand",
 230         .id             = 0,
 231         .dev            = {
 232                 .platform_data  = &nand_platdata,
 233         },
 234         .num_resources  = 1,
 235         .resource       = &nand_resource,
 236 };
 237
 238 static struct smc91x_platdata smc91x_info = {
 239         .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 240         .leda   = RPC_LED_100_10,
 241         .ledb   = RPC_LED_TX_RX,
 242 };
 243
 244 static struct resource smc91x_resources[] = {
 245         [0] = {
 246                 .start  = OMAP1710_ETHR_START,          /* Physical */
 247                 .end    = OMAP1710_ETHR_START + 0xf,
 248                 .flags  = IORESOURCE_MEM,
 249         },
 250         [1] = {
 251                 .start  = OMAP_GPIO_IRQ(40),
 252                 .end    = OMAP_GPIO_IRQ(40),
 253                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 254         },
 255 };
 256
 257 static struct platform_device smc91x_device = {
 258         .name           = "smc91x",
 259         .id             = 0,
 260         .dev    = {
 261                 .platform_data  = &smc91x_info,
 262         },
 263         .num_resources  = ARRAY_SIZE(smc91x_resources),
 264         .resource       = smc91x_resources,
 265 };
 266
 267 static void __init h3_init_smc91x(void)
 268 {
 269         omap_cfg_reg(W15_1710_GPIO40);
 270         if (gpio_request(40, "SMC91x irq") < 0) {
 271                 printk("Error requesting gpio 40 for smc91x irq\n");
 272                 return;
 273         }
 274 }
 275
 276 #define GPTIMER_BASE            0xFFFB1400
 277 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
 278 #define GPTIMER_REGS_SIZE       0x46
 279
 280 static struct resource intlat_resources[] = {
 281         [0] = {
 282                 .start  = GPTIMER_REGS(0),            /* Physical */
 283                 .end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
 284                 .flags  = IORESOURCE_MEM,
 285         },
 286         [1] = {
 287                 .start  = INT_1610_GPTIMER1,
 288                 .end    = INT_1610_GPTIMER1,
 289                 .flags  = IORESOURCE_IRQ,
 290         },
 291 };
 292
 293 static struct platform_device intlat_device = {
 294         .name      = "omap_intlat",
 295         .id          = 0,
 296         .num_resources  = ARRAY_SIZE(intlat_resources),
 297         .resource       = intlat_resources,
 298 };
 299
 300 static struct resource h3_kp_resources[] = {
 301         [0] = {
 302                 .start  = INT_KEYBOARD,
 303                 .end    = INT_KEYBOARD,
 304                 .flags  = IORESOURCE_IRQ,
 305         },
 306 };
 307
 308 static struct omap_kp_platform_data h3_kp_data = {
 309         .rows           = 8,
 310         .cols           = 8,
 311         .keymap         = h3_keymap,
 312         .keymapsize     = ARRAY_SIZE(h3_keymap),
 313         .rep            = 1,
 314         .delay          = 9,
 315         .dbounce        = 1,
 316 };
 317
 318 static struct platform_device h3_kp_device = {
 319         .name           = "omap-keypad",
 320         .id             = -1,
 321         .dev            = {
 322                 .platform_data = &h3_kp_data,
 323         },
 324         .num_resources  = ARRAY_SIZE(h3_kp_resources),
 325         .resource       = h3_kp_resources,
 326 };
 327
 328 static struct platform_device h3_lcd_device = {
 329         .name           = "lcd_h3",
 330         .id             = -1,
 331 };
 332
 333 static struct spi_board_info h3_spi_board_info[] __initdata = {
 334         [0] = {
 335                 .modalias       = "tsc2101",
 336                 .bus_num        = 2,
 337                 .chip_select    = 0,
 338                 .irq            = OMAP_GPIO_IRQ(H3_TS_GPIO),
 339                 .max_speed_hz   = 16000000,
 340                 /* .platform_data       = &tsc_platform_data, */
 341         },
 342 };
 343
 344 static struct platform_device *devices[] __initdata = {
 345         &nor_device,
 346         &nand_device,
 347         &smc91x_device,
 348         &intlat_device,
 349         &h3_kp_device,
 350         &h3_lcd_device,
 351 };
 352
 353 static struct omap_usb_config h3_usb_config __initdata = {
 354         /* usb1 has a Mini-AB port and external isp1301 transceiver */
 355         .otg        = 2,
 356
 357 #ifdef CONFIG_USB_GADGET_OMAP
 358         .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
 359 #elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 360         /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
 361         .hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
 362 #endif
 363
 364         .pins[1]        = 3,
 365 };
 366
 367 static struct omap_lcd_config h3_lcd_config __initdata = {
 368         .ctrl_name      = "internal",
 369 };
 370
 371 static struct omap_board_config_kernel h3_config[] __initdata = {
 372         { OMAP_TAG_LCD,         &h3_lcd_config },
 373 };
 374
 375 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
 376        {
 377                 I2C_BOARD_INFO("tps65013", 0x48),
 378                /* .irq         = OMAP_GPIO_IRQ(??), */
 379        },
 380         {
 381                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
 382                 .irq            = OMAP_GPIO_IRQ(14),
 383         },
 384 };
 385
 386 static void __init h3_init(void)
 387 {
 388         h3_init_smc91x();
 389
 390         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
 391          * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
 392          * notice whether a NAND chip is enabled at probe time.
 393          *
 394          * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
 395          * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
 396          * to avoid probing every possible flash configuration...
 397          */
 398         nor_resource.end = nor_resource.start = omap_cs3_phys();
 399         nor_resource.end += SZ_32M - 1;
 400
 401         nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
 402         nand_resource.end += SZ_4K - 1;
 403         if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
 404                 BUG();
 405         gpio_direction_input(H3_NAND_RB_GPIO_PIN);
 406
 407         /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
 408         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
 409         omap_cfg_reg(V2_1710_GPIO10);
 410
 411         /* Mux pins for keypad */
 412         omap_cfg_reg(F18_1610_KBC0);
 413         omap_cfg_reg(D20_1610_KBC1);
 414         omap_cfg_reg(D19_1610_KBC2);
 415         omap_cfg_reg(E18_1610_KBC3);
 416         omap_cfg_reg(C21_1610_KBC4);
 417         omap_cfg_reg(G18_1610_KBR0);
 418         omap_cfg_reg(F19_1610_KBR1);
 419         omap_cfg_reg(H14_1610_KBR2);
 420         omap_cfg_reg(E20_1610_KBR3);
 421         omap_cfg_reg(E19_1610_KBR4);
 422         omap_cfg_reg(N19_1610_KBR5);
 423
 424         platform_add_devices(devices, ARRAY_SIZE(devices));
 425         spi_register_board_info(h3_spi_board_info,
 426                                 ARRAY_SIZE(h3_spi_board_info));
 427         omap_board_config = h3_config;
 428         omap_board_config_size = ARRAY_SIZE(h3_config);
 429         omap_serial_init();
 430         omap_register_i2c_bus(1, 100, h3_i2c_board_info,
 431                               ARRAY_SIZE(h3_i2c_board_info));
 432         omap1_usb_init(&h3_usb_config);
 433         h3_mmc_init();
 434 }
 435
 436 static void __init h3_init_irq(void)
 437 {
 438         omap1_init_common_hw();
 439         omap_init_irq();
 440         omap_gpio_init();
 441 }
 442
 443 static void __init h3_map_io(void)
 444 {
 445         omap1_map_common_io();
 446 }
 447
 448 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
 449         /* Maintainer: Texas Instruments, Inc. */
 450         .boot_params    = 0x10000100,
 451         .map_io         = h3_map_io,
 452         .reserve        = omap_reserve,
 453         .init_irq       = h3_init_irq,
 454         .init_machine   = h3_init,
 455         .timer          = &omap_timer,
 456 MACHINE_END