2 * linux/arch/arm/mach-omap1/time.c
6 * Copyright (C) 2004 Nokia Corporation
7 * Partial timer rewrite and additional dynamic tick timer support by
8 * Tony Lindgen <tony@atomide.com> and
9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
11 * MPU timer code based on the older MPU timer code for OMAP
12 * Copyright (C) 2000 RidgeRun, Inc.
13 * Author: Greg Lonnon <glonnon@ridgerun.com>
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
36 #include <linux/kernel.h>
37 #include <linux/init.h>
38 #include <linux/delay.h>
39 #include <linux/interrupt.h>
40 #include <linux/sched.h>
41 #include <linux/spinlock.h>
42 #include <linux/clk.h>
43 #include <linux/err.h>
44 #include <linux/clocksource.h>
45 #include <linux/clockchips.h>
47 #include <linux/sched.h>
49 #include <asm/system.h>
50 #include <mach/hardware.h>
53 #include <asm/sched_clock.h>
55 #include <asm/mach/irq.h>
56 #include <asm/mach/time.h>
58 #include <plat/common.h>
60 #ifdef CONFIG_OMAP_MPU_TIMER
62 #define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE
63 #define OMAP_MPU_TIMER_OFFSET 0x100
66 u32 cntl; /* CNTL_TIMER, R/W */
67 u32 load_tim; /* LOAD_TIM, W */
68 u32 read_tim; /* READ_TIM, R */
69 } omap_mpu_timer_regs_t;
71 #define omap_mpu_timer_base(n) \
72 ((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
73 (n)*OMAP_MPU_TIMER_OFFSET))
75 static inline unsigned long notrace omap_mpu_timer_read(int nr)
77 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
78 return timer->read_tim;
81 static inline void omap_mpu_set_autoreset(int nr)
83 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
85 timer->cntl = timer->cntl | MPU_TIMER_AR;
88 static inline void omap_mpu_remove_autoreset(int nr)
90 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
92 timer->cntl = timer->cntl & ~MPU_TIMER_AR;
95 static inline void omap_mpu_timer_start(int nr, unsigned long load_val,
98 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
99 unsigned int timerflags = (MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_ST);
101 if (autoreset) timerflags |= MPU_TIMER_AR;
103 timer->cntl = MPU_TIMER_CLOCK_ENABLE;
105 timer->load_tim = load_val;
107 timer->cntl = timerflags;
110 static inline void omap_mpu_timer_stop(int nr)
112 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
114 timer->cntl &= ~MPU_TIMER_ST;
118 * ---------------------------------------------------------------------------
119 * MPU timer 1 ... count down to zero, interrupt, reload
120 * ---------------------------------------------------------------------------
122 static int omap_mpu_set_next_event(unsigned long cycles,
123 struct clock_event_device *evt)
125 omap_mpu_timer_start(0, cycles, 0);
129 static void omap_mpu_set_mode(enum clock_event_mode mode,
130 struct clock_event_device *evt)
133 case CLOCK_EVT_MODE_PERIODIC:
134 omap_mpu_set_autoreset(0);
136 case CLOCK_EVT_MODE_ONESHOT:
137 omap_mpu_timer_stop(0);
138 omap_mpu_remove_autoreset(0);
140 case CLOCK_EVT_MODE_UNUSED:
141 case CLOCK_EVT_MODE_SHUTDOWN:
142 case CLOCK_EVT_MODE_RESUME:
147 static struct clock_event_device clockevent_mpu_timer1 = {
148 .name = "mpu_timer1",
149 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
151 .set_next_event = omap_mpu_set_next_event,
152 .set_mode = omap_mpu_set_mode,
155 static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id)
157 struct clock_event_device *evt = &clockevent_mpu_timer1;
159 evt->event_handler(evt);
164 static struct irqaction omap_mpu_timer1_irq = {
165 .name = "mpu_timer1",
166 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
167 .handler = omap_mpu_timer1_interrupt,
170 static __init void omap_init_mpu_timer(unsigned long rate)
172 setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);
173 omap_mpu_timer_start(0, (rate / HZ) - 1, 1);
175 clockevent_mpu_timer1.mult = div_sc(rate, NSEC_PER_SEC,
176 clockevent_mpu_timer1.shift);
177 clockevent_mpu_timer1.max_delta_ns =
178 clockevent_delta2ns(-1, &clockevent_mpu_timer1);
179 clockevent_mpu_timer1.min_delta_ns =
180 clockevent_delta2ns(1, &clockevent_mpu_timer1);
182 clockevent_mpu_timer1.cpumask = cpumask_of(0);
183 clockevents_register_device(&clockevent_mpu_timer1);
188 * ---------------------------------------------------------------------------
189 * MPU timer 2 ... free running 32-bit clock source and scheduler clock
190 * ---------------------------------------------------------------------------
193 static unsigned long omap_mpu_timer2_overflows;
195 static irqreturn_t omap_mpu_timer2_interrupt(int irq, void *dev_id)
197 omap_mpu_timer2_overflows++;
201 static struct irqaction omap_mpu_timer2_irq = {
202 .name = "mpu_timer2",
203 .flags = IRQF_DISABLED,
204 .handler = omap_mpu_timer2_interrupt,
207 static cycle_t mpu_read(struct clocksource *cs)
209 return ~omap_mpu_timer_read(1);
212 static struct clocksource clocksource_mpu = {
213 .name = "mpu_timer2",
216 .mask = CLOCKSOURCE_MASK(32),
217 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
220 static DEFINE_CLOCK_DATA(cd);
222 static inline unsigned long long notrace _omap_mpu_sched_clock(void)
224 u32 cyc = mpu_read(&clocksource_mpu);
225 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
228 #ifndef CONFIG_OMAP_32K_TIMER
229 unsigned long long notrace sched_clock(void)
231 return _omap_mpu_sched_clock();
234 static unsigned long long notrace omap_mpu_sched_clock(void)
236 return _omap_mpu_sched_clock();
240 static void notrace mpu_update_sched_clock(void)
242 u32 cyc = mpu_read(&clocksource_mpu);
243 update_sched_clock(&cd, cyc, (u32)~0);
246 static void __init omap_init_clocksource(unsigned long rate)
248 static char err[] __initdata = KERN_ERR
249 "%s: can't register clocksource!\n";
251 setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
252 omap_mpu_timer_start(1, ~0, 1);
253 init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
255 if (clocksource_register_hz(&clocksource_mpu, rate))
256 printk(err, clocksource_mpu.name);
259 static void __init omap_mpu_timer_init(void)
261 struct clk *ck_ref = clk_get(NULL, "ck_ref");
264 BUG_ON(IS_ERR(ck_ref));
266 rate = clk_get_rate(ck_ref);
272 omap_init_mpu_timer(rate);
273 omap_init_clocksource(rate);
277 static inline void omap_mpu_timer_init(void)
279 pr_err("Bogus timer, should not happen\n");
281 #endif /* CONFIG_OMAP_MPU_TIMER */
283 #if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
284 static unsigned long long (*preferred_sched_clock)(void);
286 unsigned long long notrace sched_clock(void)
288 if (!preferred_sched_clock)
291 return preferred_sched_clock();
294 static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
296 if (use_32k_sched_clock)
297 preferred_sched_clock = omap_32k_sched_clock;
299 preferred_sched_clock = omap_mpu_sched_clock;
302 static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
307 static inline int omap_32k_timer_usable(void)
311 if (cpu_is_omap730() || cpu_is_omap15xx())
314 #ifdef CONFIG_OMAP_32K_TIMER
315 res = omap_32k_timer_init();
322 * ---------------------------------------------------------------------------
323 * Timer initialization
324 * ---------------------------------------------------------------------------
326 static void __init omap_timer_init(void)
328 if (omap_32k_timer_usable()) {
329 preferred_sched_clock_init(1);
331 omap_mpu_timer_init();
332 preferred_sched_clock_init(0);
336 struct sys_timer omap_timer = {
337 .init = omap_timer_init,