2 * OMAP4+ CPU idle Routines
4 * Copyright (C) 2011-2013 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Rajendra Nayak <rnayak@ti.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/sched.h>
14 #include <linux/cpuidle.h>
15 #include <linux/cpu_pm.h>
16 #include <linux/export.h>
17 #include <linux/tick.h>
19 #include <asm/cpuidle.h>
20 #include <asm/proc-fns.h>
25 #include "clockdomain.h"
29 /* Machine specific information */
30 struct idle_statedata {
36 static struct idle_statedata omap4_idle_data[] = {
38 .cpu_state = PWRDM_POWER_ON,
39 .mpu_state = PWRDM_POWER_ON,
40 .mpu_logic_state = PWRDM_POWER_RET,
43 .cpu_state = PWRDM_POWER_OFF,
44 .mpu_state = PWRDM_POWER_RET,
45 .mpu_logic_state = PWRDM_POWER_RET,
48 .cpu_state = PWRDM_POWER_OFF,
49 .mpu_state = PWRDM_POWER_RET,
50 .mpu_logic_state = PWRDM_POWER_OFF,
54 static struct powerdomain *mpu_pd, *cpu_pd[MAX_CPUS];
55 static struct clockdomain *cpu_clkdm[MAX_CPUS];
57 static atomic_t abort_barrier;
58 static bool cpu_done[MAX_CPUS];
59 static struct idle_statedata *state_ptr = &omap4_idle_data[0];
61 /* Private functions */
64 * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions
65 * @dev: cpuidle device
66 * @drv: cpuidle driver
67 * @index: the index of state to be entered
69 * Called from the CPUidle framework to program the device to the
70 * specified low power state selected by the governor.
71 * Returns the amount of time spent in the low power state.
73 static int omap_enter_idle_simple(struct cpuidle_device *dev,
74 struct cpuidle_driver *drv,
81 static int omap_enter_idle_coupled(struct cpuidle_device *dev,
82 struct cpuidle_driver *drv,
85 struct idle_statedata *cx = state_ptr + index;
86 u32 mpuss_can_lose_context = 0;
89 * CPU0 has to wait and stay ON until CPU1 is OFF state.
90 * This is necessary to honour hardware recommondation
91 * of triggeing all the possible low power modes once CPU1 is
92 * out of coherency and in OFF mode.
94 if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
95 while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF) {
99 * CPU1 could have already entered & exited idle
100 * without hitting off because of a wakeup
101 * or a failed attempt to hit off mode. Check for
102 * that here, otherwise we could spin forever
103 * waiting for CPU1 off.
111 mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
112 (cx->mpu_logic_state == PWRDM_POWER_OFF);
114 tick_broadcast_enter();
117 * Call idle CPU PM enter notifier chain so that
118 * VFP and per CPU interrupt context is saved.
123 pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
124 omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
127 * Call idle CPU cluster PM enter notifier chain
128 * to save GIC and wakeupgen context.
130 if (mpuss_can_lose_context)
131 cpu_cluster_pm_enter();
134 omap4_enter_lowpower(dev->cpu, cx->cpu_state);
135 cpu_done[dev->cpu] = true;
137 /* Wakeup CPU1 only if it is not offlined */
138 if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
140 if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
141 mpuss_can_lose_context)
144 clkdm_wakeup(cpu_clkdm[1]);
145 omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
146 clkdm_allow_idle(cpu_clkdm[1]);
148 if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
149 mpuss_can_lose_context) {
150 while (gic_dist_disabled()) {
154 gic_timer_retrigger();
159 * Call idle CPU PM exit notifier chain to restore
160 * VFP and per CPU IRQ context.
165 * Call idle CPU cluster PM exit notifier chain
166 * to restore GIC and wakeupgen context.
168 if (dev->cpu == 0 && mpuss_can_lose_context)
169 cpu_cluster_pm_exit();
171 tick_broadcast_exit();
174 cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
175 cpu_done[dev->cpu] = false;
181 * For each cpu, setup the broadcast timer because local timers
182 * stops for the states above C1.
184 static void omap_setup_broadcast_timer(void *arg)
186 tick_broadcast_enable();
189 static struct cpuidle_driver omap4_idle_driver = {
190 .name = "omap4_idle",
191 .owner = THIS_MODULE,
194 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
195 .exit_latency = 2 + 2,
196 .target_residency = 5,
197 .enter = omap_enter_idle_simple,
199 .desc = "CPUx ON, MPUSS ON"
202 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
203 .exit_latency = 328 + 440,
204 .target_residency = 960,
205 .flags = CPUIDLE_FLAG_COUPLED,
206 .enter = omap_enter_idle_coupled,
208 .desc = "CPUx OFF, MPUSS CSWR",
211 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
212 .exit_latency = 460 + 518,
213 .target_residency = 1100,
214 .flags = CPUIDLE_FLAG_COUPLED,
215 .enter = omap_enter_idle_coupled,
217 .desc = "CPUx OFF, MPUSS OSWR",
220 .state_count = ARRAY_SIZE(omap4_idle_data),
221 .safe_state_index = 0,
224 /* Public functions */
227 * omap4_idle_init - Init routine for OMAP4+ idle
229 * Registers the OMAP4+ specific cpuidle driver to the cpuidle
230 * framework with the valid set of states.
232 int __init omap4_idle_init(void)
234 mpu_pd = pwrdm_lookup("mpu_pwrdm");
235 cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
236 cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
237 if ((!mpu_pd) || (!cpu_pd[0]) || (!cpu_pd[1]))
240 cpu_clkdm[0] = clkdm_lookup("mpu0_clkdm");
241 cpu_clkdm[1] = clkdm_lookup("mpu1_clkdm");
242 if (!cpu_clkdm[0] || !cpu_clkdm[1])
245 /* Configure the broadcast timer on each cpu */
246 on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
248 return cpuidle_register(&omap4_idle_driver, cpu_online_mask);