2 * linux/arch/arm/mach-omap2/io.c
4 * OMAP2 I/O mapping code
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
13 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
23 #include <linux/clk.h>
24 #include <linux/omapfb.h>
28 #include <asm/mach/map.h>
30 #include <plat/sram.h>
31 #include <plat/sdrc.h>
32 #include <plat/serial.h>
34 #include "clock2xxx.h"
35 #include "clock3xxx.h"
36 #include "clock44xx.h"
39 #include <plat/omap-pm.h>
41 #include "powerdomain.h"
43 #include "clockdomain.h"
44 #include <plat/omap_hwmod.h>
45 #include <plat/multi.h>
48 * The machine specific code may provide the extra mapping besides the
49 * default mapping provided here.
52 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
53 static struct map_desc omap24xx_io_desc[] __initdata = {
55 .virtual = L3_24XX_VIRT,
56 .pfn = __phys_to_pfn(L3_24XX_PHYS),
57 .length = L3_24XX_SIZE,
61 .virtual = L4_24XX_VIRT,
62 .pfn = __phys_to_pfn(L4_24XX_PHYS),
63 .length = L4_24XX_SIZE,
68 #ifdef CONFIG_SOC_OMAP2420
69 static struct map_desc omap242x_io_desc[] __initdata = {
71 .virtual = DSP_MEM_2420_VIRT,
72 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
73 .length = DSP_MEM_2420_SIZE,
77 .virtual = DSP_IPI_2420_VIRT,
78 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
79 .length = DSP_IPI_2420_SIZE,
83 .virtual = DSP_MMU_2420_VIRT,
84 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
85 .length = DSP_MMU_2420_SIZE,
92 #ifdef CONFIG_SOC_OMAP2430
93 static struct map_desc omap243x_io_desc[] __initdata = {
95 .virtual = L4_WK_243X_VIRT,
96 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
97 .length = L4_WK_243X_SIZE,
101 .virtual = OMAP243X_GPMC_VIRT,
102 .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
103 .length = OMAP243X_GPMC_SIZE,
107 .virtual = OMAP243X_SDRC_VIRT,
108 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
109 .length = OMAP243X_SDRC_SIZE,
113 .virtual = OMAP243X_SMS_VIRT,
114 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
115 .length = OMAP243X_SMS_SIZE,
122 #ifdef CONFIG_ARCH_OMAP3
123 static struct map_desc omap34xx_io_desc[] __initdata = {
125 .virtual = L3_34XX_VIRT,
126 .pfn = __phys_to_pfn(L3_34XX_PHYS),
127 .length = L3_34XX_SIZE,
131 .virtual = L4_34XX_VIRT,
132 .pfn = __phys_to_pfn(L4_34XX_PHYS),
133 .length = L4_34XX_SIZE,
137 .virtual = OMAP34XX_GPMC_VIRT,
138 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
139 .length = OMAP34XX_GPMC_SIZE,
143 .virtual = OMAP343X_SMS_VIRT,
144 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
145 .length = OMAP343X_SMS_SIZE,
149 .virtual = OMAP343X_SDRC_VIRT,
150 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
151 .length = OMAP343X_SDRC_SIZE,
155 .virtual = L4_PER_34XX_VIRT,
156 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
157 .length = L4_PER_34XX_SIZE,
161 .virtual = L4_EMU_34XX_VIRT,
162 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
163 .length = L4_EMU_34XX_SIZE,
166 #if defined(CONFIG_DEBUG_LL) && \
167 (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
169 .virtual = ZOOM_UART_VIRT,
170 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
178 #ifdef CONFIG_SOC_OMAPTI81XX
179 static struct map_desc omapti81xx_io_desc[] __initdata = {
181 .virtual = L4_34XX_VIRT,
182 .pfn = __phys_to_pfn(L4_34XX_PHYS),
183 .length = L4_34XX_SIZE,
189 #ifdef CONFIG_SOC_OMAPAM33XX
190 static struct map_desc omapam33xx_io_desc[] __initdata = {
192 .virtual = L4_34XX_VIRT,
193 .pfn = __phys_to_pfn(L4_34XX_PHYS),
194 .length = L4_34XX_SIZE,
198 .virtual = L4_WK_AM33XX_VIRT,
199 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
200 .length = L4_WK_AM33XX_SIZE,
206 #ifdef CONFIG_ARCH_OMAP4
207 static struct map_desc omap44xx_io_desc[] __initdata = {
209 .virtual = L3_44XX_VIRT,
210 .pfn = __phys_to_pfn(L3_44XX_PHYS),
211 .length = L3_44XX_SIZE,
215 .virtual = L4_44XX_VIRT,
216 .pfn = __phys_to_pfn(L4_44XX_PHYS),
217 .length = L4_44XX_SIZE,
221 .virtual = OMAP44XX_GPMC_VIRT,
222 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
223 .length = OMAP44XX_GPMC_SIZE,
227 .virtual = OMAP44XX_EMIF1_VIRT,
228 .pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
229 .length = OMAP44XX_EMIF1_SIZE,
233 .virtual = OMAP44XX_EMIF2_VIRT,
234 .pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
235 .length = OMAP44XX_EMIF2_SIZE,
239 .virtual = OMAP44XX_DMM_VIRT,
240 .pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
241 .length = OMAP44XX_DMM_SIZE,
245 .virtual = L4_PER_44XX_VIRT,
246 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
247 .length = L4_PER_44XX_SIZE,
251 .virtual = L4_EMU_44XX_VIRT,
252 .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
253 .length = L4_EMU_44XX_SIZE,
256 #ifdef CONFIG_OMAP4_ERRATA_I688
258 .virtual = OMAP4_SRAM_VA,
259 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
261 .type = MT_MEMORY_SO,
268 #ifdef CONFIG_SOC_OMAP2420
269 void __init omap242x_map_common_io(void)
271 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
272 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
276 #ifdef CONFIG_SOC_OMAP2430
277 void __init omap243x_map_common_io(void)
279 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
280 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
284 #ifdef CONFIG_ARCH_OMAP3
285 void __init omap34xx_map_common_io(void)
287 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
291 #ifdef CONFIG_SOC_OMAPTI81XX
292 void __init omapti81xx_map_common_io(void)
294 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
298 #ifdef CONFIG_SOC_OMAPAM33XX
299 void __init omapam33xx_map_common_io(void)
301 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
305 #ifdef CONFIG_ARCH_OMAP4
306 void __init omap44xx_map_common_io(void)
308 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
309 omap_barriers_init();
314 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
316 * Sets the CORE DPLL3 M2 divider to the same value that it's at
317 * currently. This has the effect of setting the SDRC SDRAM AC timing
318 * registers to the values currently defined by the kernel. Currently
319 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
320 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
321 * or passes along the return value of clk_set_rate().
323 static int __init _omap2_init_reprogram_sdrc(void)
325 struct clk *dpll3_m2_ck;
329 if (!cpu_is_omap34xx())
332 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
333 if (IS_ERR(dpll3_m2_ck))
336 rate = clk_get_rate(dpll3_m2_ck);
337 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
338 v = clk_set_rate(dpll3_m2_ck, rate);
340 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
342 clk_put(dpll3_m2_ck);
347 static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
349 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
352 static void __init omap_common_init_early(void)
354 omap2_check_revision();
355 omap_init_consistent_dma_size();
358 static void __init omap_hwmod_init_postsetup(void)
362 /* Set the default postsetup state for all hwmods */
363 #ifdef CONFIG_PM_RUNTIME
364 postsetup_state = _HWMOD_STATE_IDLE;
366 postsetup_state = _HWMOD_STATE_ENABLED;
368 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
371 * Set the default postsetup state for unusual modules (like
374 * The postsetup_state is not actually used until
375 * omap_hwmod_late_init(), so boards that desire full watchdog
376 * coverage of kernel initialization can reprogram the
377 * postsetup_state between the calls to
378 * omap2_init_common_infra() and omap_sdrc_init().
380 * XXX ideally we could detect whether the MPU WDT was currently
381 * enabled here and make this conditional
383 postsetup_state = _HWMOD_STATE_DISABLED;
384 omap_hwmod_for_each_by_class("wd_timer",
385 _set_hwmod_postsetup_state,
388 omap_pm_if_early_init();
391 #ifdef CONFIG_SOC_OMAP2420
392 void __init omap2420_init_early(void)
394 omap2_set_globals_242x();
395 omap_common_init_early();
396 omap2xxx_voltagedomains_init();
397 omap242x_powerdomains_init();
398 omap242x_clockdomains_init();
399 omap2420_hwmod_init();
400 omap_hwmod_init_postsetup();
405 #ifdef CONFIG_SOC_OMAP2430
406 void __init omap2430_init_early(void)
408 omap2_set_globals_243x();
409 omap_common_init_early();
410 omap2xxx_voltagedomains_init();
411 omap243x_powerdomains_init();
412 omap243x_clockdomains_init();
413 omap2430_hwmod_init();
414 omap_hwmod_init_postsetup();
420 * Currently only board-omap3beagle.c should call this because of the
421 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
423 #ifdef CONFIG_ARCH_OMAP3
424 void __init omap3_init_early(void)
426 omap2_set_globals_3xxx();
427 omap_common_init_early();
428 omap3xxx_voltagedomains_init();
429 omap3xxx_powerdomains_init();
430 omap3xxx_clockdomains_init();
431 omap3xxx_hwmod_init();
432 omap_hwmod_init_postsetup();
436 void __init omap3430_init_early(void)
441 void __init omap35xx_init_early(void)
446 void __init omap3630_init_early(void)
451 void __init am35xx_init_early(void)
456 void __init ti81xx_init_early(void)
458 omap2_set_globals_ti81xx();
459 omap_common_init_early();
460 omap3xxx_voltagedomains_init();
461 omap3xxx_powerdomains_init();
462 omap3xxx_clockdomains_init();
463 omap3xxx_hwmod_init();
464 omap_hwmod_init_postsetup();
469 #ifdef CONFIG_ARCH_OMAP4
470 void __init omap4430_init_early(void)
472 omap2_set_globals_443x();
473 omap_common_init_early();
474 omap44xx_voltagedomains_init();
475 omap44xx_powerdomains_init();
476 omap44xx_clockdomains_init();
477 omap44xx_hwmod_init();
478 omap_hwmod_init_postsetup();
483 void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
484 struct omap_sdrc_params *sdrc_cs1)
488 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
489 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
490 _omap2_init_reprogram_sdrc();
495 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
498 u8 omap_readb(u32 pa)
500 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
502 EXPORT_SYMBOL(omap_readb);
504 u16 omap_readw(u32 pa)
506 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
508 EXPORT_SYMBOL(omap_readw);
510 u32 omap_readl(u32 pa)
512 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
514 EXPORT_SYMBOL(omap_readl);
516 void omap_writeb(u8 v, u32 pa)
518 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
520 EXPORT_SYMBOL(omap_writeb);
522 void omap_writew(u16 v, u32 pa)
524 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
526 EXPORT_SYMBOL(omap_writew);
528 void omap_writel(u32 v, u32 pa)
530 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
532 EXPORT_SYMBOL(omap_writel);