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ARM: OMAP4: PM: Add power domain statistics support
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1 /*
2  * linux/arch/arm/mach-omap2/io.c
3  *
4  * OMAP2 I/O mapping code
5  *
6  * Copyright (C) 2005 Nokia Corporation
7  * Copyright (C) 2007-2009 Texas Instruments
8  *
9  * Author:
10  *      Juha Yrjola <juha.yrjola@nokia.com>
11  *      Syed Khasim <x0khasim@ti.com>
12  *
13  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14  *
15  * This program is free software; you can redistribute it and/or modify
16  * it under the terms of the GNU General Public License version 2 as
17  * published by the Free Software Foundation.
18  */
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/io.h>
23 #include <linux/clk.h>
24 #include <linux/omapfb.h>
25
26 #include <asm/tlb.h>
27
28 #include <asm/mach/map.h>
29
30 #include <plat/sram.h>
31 #include <plat/sdrc.h>
32 #include <plat/serial.h>
33
34 #include "clock2xxx.h"
35 #include "clock3xxx.h"
36 #include "clock44xx.h"
37
38 #include "common.h"
39 #include <plat/omap-pm.h>
40 #include "voltage.h"
41 #include "powerdomain.h"
42
43 #include "clockdomain.h"
44 #include <plat/omap_hwmod.h>
45 #include <plat/multi.h>
46 #include "common.h"
47
48 /*
49  * The machine specific code may provide the extra mapping besides the
50  * default mapping provided here.
51  */
52
53 #ifdef CONFIG_ARCH_OMAP2
54 static struct map_desc omap24xx_io_desc[] __initdata = {
55         {
56                 .virtual        = L3_24XX_VIRT,
57                 .pfn            = __phys_to_pfn(L3_24XX_PHYS),
58                 .length         = L3_24XX_SIZE,
59                 .type           = MT_DEVICE
60         },
61         {
62                 .virtual        = L4_24XX_VIRT,
63                 .pfn            = __phys_to_pfn(L4_24XX_PHYS),
64                 .length         = L4_24XX_SIZE,
65                 .type           = MT_DEVICE
66         },
67 };
68
69 #ifdef CONFIG_SOC_OMAP2420
70 static struct map_desc omap242x_io_desc[] __initdata = {
71         {
72                 .virtual        = DSP_MEM_2420_VIRT,
73                 .pfn            = __phys_to_pfn(DSP_MEM_2420_PHYS),
74                 .length         = DSP_MEM_2420_SIZE,
75                 .type           = MT_DEVICE
76         },
77         {
78                 .virtual        = DSP_IPI_2420_VIRT,
79                 .pfn            = __phys_to_pfn(DSP_IPI_2420_PHYS),
80                 .length         = DSP_IPI_2420_SIZE,
81                 .type           = MT_DEVICE
82         },
83         {
84                 .virtual        = DSP_MMU_2420_VIRT,
85                 .pfn            = __phys_to_pfn(DSP_MMU_2420_PHYS),
86                 .length         = DSP_MMU_2420_SIZE,
87                 .type           = MT_DEVICE
88         },
89 };
90
91 #endif
92
93 #ifdef CONFIG_SOC_OMAP2430
94 static struct map_desc omap243x_io_desc[] __initdata = {
95         {
96                 .virtual        = L4_WK_243X_VIRT,
97                 .pfn            = __phys_to_pfn(L4_WK_243X_PHYS),
98                 .length         = L4_WK_243X_SIZE,
99                 .type           = MT_DEVICE
100         },
101         {
102                 .virtual        = OMAP243X_GPMC_VIRT,
103                 .pfn            = __phys_to_pfn(OMAP243X_GPMC_PHYS),
104                 .length         = OMAP243X_GPMC_SIZE,
105                 .type           = MT_DEVICE
106         },
107         {
108                 .virtual        = OMAP243X_SDRC_VIRT,
109                 .pfn            = __phys_to_pfn(OMAP243X_SDRC_PHYS),
110                 .length         = OMAP243X_SDRC_SIZE,
111                 .type           = MT_DEVICE
112         },
113         {
114                 .virtual        = OMAP243X_SMS_VIRT,
115                 .pfn            = __phys_to_pfn(OMAP243X_SMS_PHYS),
116                 .length         = OMAP243X_SMS_SIZE,
117                 .type           = MT_DEVICE
118         },
119 };
120 #endif
121 #endif
122
123 #ifdef  CONFIG_ARCH_OMAP3
124 static struct map_desc omap34xx_io_desc[] __initdata = {
125         {
126                 .virtual        = L3_34XX_VIRT,
127                 .pfn            = __phys_to_pfn(L3_34XX_PHYS),
128                 .length         = L3_34XX_SIZE,
129                 .type           = MT_DEVICE
130         },
131         {
132                 .virtual        = L4_34XX_VIRT,
133                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
134                 .length         = L4_34XX_SIZE,
135                 .type           = MT_DEVICE
136         },
137         {
138                 .virtual        = OMAP34XX_GPMC_VIRT,
139                 .pfn            = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
140                 .length         = OMAP34XX_GPMC_SIZE,
141                 .type           = MT_DEVICE
142         },
143         {
144                 .virtual        = OMAP343X_SMS_VIRT,
145                 .pfn            = __phys_to_pfn(OMAP343X_SMS_PHYS),
146                 .length         = OMAP343X_SMS_SIZE,
147                 .type           = MT_DEVICE
148         },
149         {
150                 .virtual        = OMAP343X_SDRC_VIRT,
151                 .pfn            = __phys_to_pfn(OMAP343X_SDRC_PHYS),
152                 .length         = OMAP343X_SDRC_SIZE,
153                 .type           = MT_DEVICE
154         },
155         {
156                 .virtual        = L4_PER_34XX_VIRT,
157                 .pfn            = __phys_to_pfn(L4_PER_34XX_PHYS),
158                 .length         = L4_PER_34XX_SIZE,
159                 .type           = MT_DEVICE
160         },
161         {
162                 .virtual        = L4_EMU_34XX_VIRT,
163                 .pfn            = __phys_to_pfn(L4_EMU_34XX_PHYS),
164                 .length         = L4_EMU_34XX_SIZE,
165                 .type           = MT_DEVICE
166         },
167 #if defined(CONFIG_DEBUG_LL) &&                                                 \
168         (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
169         {
170                 .virtual        = ZOOM_UART_VIRT,
171                 .pfn            = __phys_to_pfn(ZOOM_UART_BASE),
172                 .length         = SZ_1M,
173                 .type           = MT_DEVICE
174         },
175 #endif
176 };
177 #endif
178
179 #ifdef CONFIG_SOC_OMAPTI816X
180 static struct map_desc omapti816x_io_desc[] __initdata = {
181         {
182                 .virtual        = L4_34XX_VIRT,
183                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
184                 .length         = L4_34XX_SIZE,
185                 .type           = MT_DEVICE
186         },
187 };
188 #endif
189
190 #ifdef  CONFIG_ARCH_OMAP4
191 static struct map_desc omap44xx_io_desc[] __initdata = {
192         {
193                 .virtual        = L3_44XX_VIRT,
194                 .pfn            = __phys_to_pfn(L3_44XX_PHYS),
195                 .length         = L3_44XX_SIZE,
196                 .type           = MT_DEVICE,
197         },
198         {
199                 .virtual        = L4_44XX_VIRT,
200                 .pfn            = __phys_to_pfn(L4_44XX_PHYS),
201                 .length         = L4_44XX_SIZE,
202                 .type           = MT_DEVICE,
203         },
204         {
205                 .virtual        = OMAP44XX_GPMC_VIRT,
206                 .pfn            = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
207                 .length         = OMAP44XX_GPMC_SIZE,
208                 .type           = MT_DEVICE,
209         },
210         {
211                 .virtual        = OMAP44XX_EMIF1_VIRT,
212                 .pfn            = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
213                 .length         = OMAP44XX_EMIF1_SIZE,
214                 .type           = MT_DEVICE,
215         },
216         {
217                 .virtual        = OMAP44XX_EMIF2_VIRT,
218                 .pfn            = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
219                 .length         = OMAP44XX_EMIF2_SIZE,
220                 .type           = MT_DEVICE,
221         },
222         {
223                 .virtual        = OMAP44XX_DMM_VIRT,
224                 .pfn            = __phys_to_pfn(OMAP44XX_DMM_PHYS),
225                 .length         = OMAP44XX_DMM_SIZE,
226                 .type           = MT_DEVICE,
227         },
228         {
229                 .virtual        = L4_PER_44XX_VIRT,
230                 .pfn            = __phys_to_pfn(L4_PER_44XX_PHYS),
231                 .length         = L4_PER_44XX_SIZE,
232                 .type           = MT_DEVICE,
233         },
234         {
235                 .virtual        = L4_EMU_44XX_VIRT,
236                 .pfn            = __phys_to_pfn(L4_EMU_44XX_PHYS),
237                 .length         = L4_EMU_44XX_SIZE,
238                 .type           = MT_DEVICE,
239         },
240 };
241 #endif
242
243 #ifdef CONFIG_SOC_OMAP2420
244 void __init omap242x_map_common_io(void)
245 {
246         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
247         iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
248 }
249 #endif
250
251 #ifdef CONFIG_SOC_OMAP2430
252 void __init omap243x_map_common_io(void)
253 {
254         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
255         iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
256 }
257 #endif
258
259 #ifdef CONFIG_ARCH_OMAP3
260 void __init omap34xx_map_common_io(void)
261 {
262         iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
263 }
264 #endif
265
266 #ifdef CONFIG_SOC_OMAPTI816X
267 void __init omapti816x_map_common_io(void)
268 {
269         iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc));
270 }
271 #endif
272
273 #ifdef CONFIG_ARCH_OMAP4
274 void __init omap44xx_map_common_io(void)
275 {
276         iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
277 }
278 #endif
279
280 /*
281  * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
282  *
283  * Sets the CORE DPLL3 M2 divider to the same value that it's at
284  * currently.  This has the effect of setting the SDRC SDRAM AC timing
285  * registers to the values currently defined by the kernel.  Currently
286  * only defined for OMAP3; will return 0 if called on OMAP2.  Returns
287  * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
288  * or passes along the return value of clk_set_rate().
289  */
290 static int __init _omap2_init_reprogram_sdrc(void)
291 {
292         struct clk *dpll3_m2_ck;
293         int v = -EINVAL;
294         long rate;
295
296         if (!cpu_is_omap34xx())
297                 return 0;
298
299         dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
300         if (IS_ERR(dpll3_m2_ck))
301                 return -EINVAL;
302
303         rate = clk_get_rate(dpll3_m2_ck);
304         pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
305         v = clk_set_rate(dpll3_m2_ck, rate);
306         if (v)
307                 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
308
309         clk_put(dpll3_m2_ck);
310
311         return v;
312 }
313
314 static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
315 {
316         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
317 }
318
319 static void __init omap_common_init_early(void)
320 {
321         omap2_check_revision();
322         omap_init_consistent_dma_size();
323 }
324
325 static void __init omap_hwmod_init_postsetup(void)
326 {
327         u8 postsetup_state;
328
329         /* Set the default postsetup state for all hwmods */
330 #ifdef CONFIG_PM_RUNTIME
331         postsetup_state = _HWMOD_STATE_IDLE;
332 #else
333         postsetup_state = _HWMOD_STATE_ENABLED;
334 #endif
335         omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
336
337         /*
338          * Set the default postsetup state for unusual modules (like
339          * MPU WDT).
340          *
341          * The postsetup_state is not actually used until
342          * omap_hwmod_late_init(), so boards that desire full watchdog
343          * coverage of kernel initialization can reprogram the
344          * postsetup_state between the calls to
345          * omap2_init_common_infra() and omap_sdrc_init().
346          *
347          * XXX ideally we could detect whether the MPU WDT was currently
348          * enabled here and make this conditional
349          */
350         postsetup_state = _HWMOD_STATE_DISABLED;
351         omap_hwmod_for_each_by_class("wd_timer",
352                                      _set_hwmod_postsetup_state,
353                                      &postsetup_state);
354
355         omap_pm_if_early_init();
356 }
357
358 #ifdef CONFIG_ARCH_OMAP2
359 void __init omap2420_init_early(void)
360 {
361         omap2_set_globals_242x();
362         omap_common_init_early();
363         omap2xxx_voltagedomains_init();
364         omap242x_powerdomains_init();
365         omap242x_clockdomains_init();
366         omap2420_hwmod_init();
367         omap_hwmod_init_postsetup();
368         omap2420_clk_init();
369 }
370
371 void __init omap2430_init_early(void)
372 {
373         omap2_set_globals_243x();
374         omap_common_init_early();
375         omap2xxx_voltagedomains_init();
376         omap243x_powerdomains_init();
377         omap243x_clockdomains_init();
378         omap2430_hwmod_init();
379         omap_hwmod_init_postsetup();
380         omap2430_clk_init();
381 }
382 #endif
383
384 /*
385  * Currently only board-omap3beagle.c should call this because of the
386  * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
387  */
388 #ifdef CONFIG_ARCH_OMAP3
389 void __init omap3_init_early(void)
390 {
391         omap2_set_globals_3xxx();
392         omap_common_init_early();
393         omap3xxx_voltagedomains_init();
394         omap3xxx_powerdomains_init();
395         omap3xxx_clockdomains_init();
396         omap3xxx_hwmod_init();
397         omap_hwmod_init_postsetup();
398         omap3xxx_clk_init();
399 }
400
401 void __init omap3430_init_early(void)
402 {
403         omap3_init_early();
404 }
405
406 void __init omap35xx_init_early(void)
407 {
408         omap3_init_early();
409 }
410
411 void __init omap3630_init_early(void)
412 {
413         omap3_init_early();
414 }
415
416 void __init am35xx_init_early(void)
417 {
418         omap3_init_early();
419 }
420
421 void __init ti816x_init_early(void)
422 {
423         omap2_set_globals_ti816x();
424         omap_common_init_early();
425         omap3xxx_voltagedomains_init();
426         omap3xxx_powerdomains_init();
427         omap3xxx_clockdomains_init();
428         omap3xxx_hwmod_init();
429         omap_hwmod_init_postsetup();
430         omap3xxx_clk_init();
431 }
432 #endif
433
434 #ifdef CONFIG_ARCH_OMAP4
435 void __init omap4430_init_early(void)
436 {
437         omap2_set_globals_443x();
438         omap_common_init_early();
439         omap44xx_voltagedomains_init();
440         omap44xx_powerdomains_init();
441         omap44xx_clockdomains_init();
442         omap44xx_hwmod_init();
443         omap_hwmod_init_postsetup();
444         omap4xxx_clk_init();
445 }
446 #endif
447
448 void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
449                                       struct omap_sdrc_params *sdrc_cs1)
450 {
451         omap_sram_init();
452
453         if (cpu_is_omap24xx() || omap3_has_sdrc()) {
454                 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
455                 _omap2_init_reprogram_sdrc();
456         }
457 }
458
459 /*
460  * NOTE: Please use ioremap + __raw_read/write where possible instead of these
461  */
462
463 u8 omap_readb(u32 pa)
464 {
465         return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
466 }
467 EXPORT_SYMBOL(omap_readb);
468
469 u16 omap_readw(u32 pa)
470 {
471         return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
472 }
473 EXPORT_SYMBOL(omap_readw);
474
475 u32 omap_readl(u32 pa)
476 {
477         return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
478 }
479 EXPORT_SYMBOL(omap_readl);
480
481 void omap_writeb(u8 v, u32 pa)
482 {
483         __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
484 }
485 EXPORT_SYMBOL(omap_writeb);
486
487 void omap_writew(u16 v, u32 pa)
488 {
489         __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
490 }
491 EXPORT_SYMBOL(omap_writew);
492
493 void omap_writel(u32 v, u32 pa)
494 {
495         __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
496 }
497 EXPORT_SYMBOL(omap_writel);