2 * linux/arch/arm/mach-omap2/io.c
4 * OMAP2 I/O mapping code
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
13 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
23 #include <linux/clk.h>
26 #include <asm/mach/map.h>
28 #include <linux/omap-dma.h>
30 #include "omap_hwmod.h"
34 #include "powerdomain.h"
35 #include "clockdomain.h"
38 #include "clock2xxx.h"
39 #include "clock3xxx.h"
40 #include "clock44xx.h"
50 #include "prcm_mpu44xx.h"
51 #include "prminst44xx.h"
52 #include "cminst44xx.h"
58 * The machine specific code may provide the extra mapping besides the
59 * default mapping provided here.
62 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
63 static struct map_desc omap24xx_io_desc[] __initdata = {
65 .virtual = L3_24XX_VIRT,
66 .pfn = __phys_to_pfn(L3_24XX_PHYS),
67 .length = L3_24XX_SIZE,
71 .virtual = L4_24XX_VIRT,
72 .pfn = __phys_to_pfn(L4_24XX_PHYS),
73 .length = L4_24XX_SIZE,
78 #ifdef CONFIG_SOC_OMAP2420
79 static struct map_desc omap242x_io_desc[] __initdata = {
81 .virtual = DSP_MEM_2420_VIRT,
82 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
83 .length = DSP_MEM_2420_SIZE,
87 .virtual = DSP_IPI_2420_VIRT,
88 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
89 .length = DSP_IPI_2420_SIZE,
93 .virtual = DSP_MMU_2420_VIRT,
94 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
95 .length = DSP_MMU_2420_SIZE,
102 #ifdef CONFIG_SOC_OMAP2430
103 static struct map_desc omap243x_io_desc[] __initdata = {
105 .virtual = L4_WK_243X_VIRT,
106 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
107 .length = L4_WK_243X_SIZE,
111 .virtual = OMAP243X_GPMC_VIRT,
112 .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
113 .length = OMAP243X_GPMC_SIZE,
117 .virtual = OMAP243X_SDRC_VIRT,
118 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
119 .length = OMAP243X_SDRC_SIZE,
123 .virtual = OMAP243X_SMS_VIRT,
124 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
125 .length = OMAP243X_SMS_SIZE,
132 #ifdef CONFIG_ARCH_OMAP3
133 static struct map_desc omap34xx_io_desc[] __initdata = {
135 .virtual = L3_34XX_VIRT,
136 .pfn = __phys_to_pfn(L3_34XX_PHYS),
137 .length = L3_34XX_SIZE,
141 .virtual = L4_34XX_VIRT,
142 .pfn = __phys_to_pfn(L4_34XX_PHYS),
143 .length = L4_34XX_SIZE,
147 .virtual = OMAP34XX_GPMC_VIRT,
148 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
149 .length = OMAP34XX_GPMC_SIZE,
153 .virtual = OMAP343X_SMS_VIRT,
154 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
155 .length = OMAP343X_SMS_SIZE,
159 .virtual = OMAP343X_SDRC_VIRT,
160 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
161 .length = OMAP343X_SDRC_SIZE,
165 .virtual = L4_PER_34XX_VIRT,
166 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
167 .length = L4_PER_34XX_SIZE,
171 .virtual = L4_EMU_34XX_VIRT,
172 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
173 .length = L4_EMU_34XX_SIZE,
176 #if defined(CONFIG_DEBUG_LL) && \
177 (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
179 .virtual = ZOOM_UART_VIRT,
180 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
188 #ifdef CONFIG_SOC_TI81XX
189 static struct map_desc omapti81xx_io_desc[] __initdata = {
191 .virtual = L4_34XX_VIRT,
192 .pfn = __phys_to_pfn(L4_34XX_PHYS),
193 .length = L4_34XX_SIZE,
199 #ifdef CONFIG_SOC_AM33XX
200 static struct map_desc omapam33xx_io_desc[] __initdata = {
202 .virtual = L4_34XX_VIRT,
203 .pfn = __phys_to_pfn(L4_34XX_PHYS),
204 .length = L4_34XX_SIZE,
208 .virtual = L4_WK_AM33XX_VIRT,
209 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
210 .length = L4_WK_AM33XX_SIZE,
216 #ifdef CONFIG_ARCH_OMAP4
217 static struct map_desc omap44xx_io_desc[] __initdata = {
219 .virtual = L3_44XX_VIRT,
220 .pfn = __phys_to_pfn(L3_44XX_PHYS),
221 .length = L3_44XX_SIZE,
225 .virtual = L4_44XX_VIRT,
226 .pfn = __phys_to_pfn(L4_44XX_PHYS),
227 .length = L4_44XX_SIZE,
231 .virtual = L4_PER_44XX_VIRT,
232 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
233 .length = L4_PER_44XX_SIZE,
236 #ifdef CONFIG_OMAP4_ERRATA_I688
238 .virtual = OMAP4_SRAM_VA,
239 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
241 .type = MT_MEMORY_SO,
248 #ifdef CONFIG_SOC_OMAP5
249 static struct map_desc omap54xx_io_desc[] __initdata = {
251 .virtual = L3_54XX_VIRT,
252 .pfn = __phys_to_pfn(L3_54XX_PHYS),
253 .length = L3_54XX_SIZE,
257 .virtual = L4_54XX_VIRT,
258 .pfn = __phys_to_pfn(L4_54XX_PHYS),
259 .length = L4_54XX_SIZE,
263 .virtual = L4_WK_54XX_VIRT,
264 .pfn = __phys_to_pfn(L4_WK_54XX_PHYS),
265 .length = L4_WK_54XX_SIZE,
269 .virtual = L4_PER_54XX_VIRT,
270 .pfn = __phys_to_pfn(L4_PER_54XX_PHYS),
271 .length = L4_PER_54XX_SIZE,
274 #ifdef CONFIG_OMAP4_ERRATA_I688
276 .virtual = OMAP4_SRAM_VA,
277 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
279 .type = MT_MEMORY_SO,
285 #ifdef CONFIG_SOC_OMAP2420
286 void __init omap242x_map_io(void)
288 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
289 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
293 #ifdef CONFIG_SOC_OMAP2430
294 void __init omap243x_map_io(void)
296 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
297 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
301 #ifdef CONFIG_ARCH_OMAP3
302 void __init omap3_map_io(void)
304 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
308 #ifdef CONFIG_SOC_TI81XX
309 void __init ti81xx_map_io(void)
311 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
315 #ifdef CONFIG_SOC_AM33XX
316 void __init am33xx_map_io(void)
318 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
322 #ifdef CONFIG_ARCH_OMAP4
323 void __init omap4_map_io(void)
325 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
326 omap_barriers_init();
330 #ifdef CONFIG_SOC_OMAP5
331 void __init omap5_map_io(void)
333 iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
334 omap_barriers_init();
338 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
340 * Sets the CORE DPLL3 M2 divider to the same value that it's at
341 * currently. This has the effect of setting the SDRC SDRAM AC timing
342 * registers to the values currently defined by the kernel. Currently
343 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
344 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
345 * or passes along the return value of clk_set_rate().
347 static int __init _omap2_init_reprogram_sdrc(void)
349 struct clk *dpll3_m2_ck;
353 if (!cpu_is_omap34xx())
356 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
357 if (IS_ERR(dpll3_m2_ck))
360 rate = clk_get_rate(dpll3_m2_ck);
361 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
362 v = clk_set_rate(dpll3_m2_ck, rate);
364 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
366 clk_put(dpll3_m2_ck);
371 static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
373 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
376 static void __init omap_hwmod_init_postsetup(void)
380 /* Set the default postsetup state for all hwmods */
381 #ifdef CONFIG_PM_RUNTIME
382 postsetup_state = _HWMOD_STATE_IDLE;
384 postsetup_state = _HWMOD_STATE_ENABLED;
386 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
388 omap_pm_if_early_init();
391 #ifdef CONFIG_SOC_OMAP2420
392 void __init omap2420_init_early(void)
394 omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
395 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
396 OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
397 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
399 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
400 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
401 omap2xxx_check_revision();
404 omap2xxx_voltagedomains_init();
405 omap242x_powerdomains_init();
406 omap242x_clockdomains_init();
407 omap2420_hwmod_init();
408 omap_hwmod_init_postsetup();
412 void __init omap2420_init_late(void)
414 omap_mux_late_init();
415 omap2_common_pm_late_init();
417 omap2_clk_enable_autoidle_all();
421 #ifdef CONFIG_SOC_OMAP2430
422 void __init omap2430_init_early(void)
424 omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
425 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
426 OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
427 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
429 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
430 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
431 omap2xxx_check_revision();
434 omap2xxx_voltagedomains_init();
435 omap243x_powerdomains_init();
436 omap243x_clockdomains_init();
437 omap2430_hwmod_init();
438 omap_hwmod_init_postsetup();
442 void __init omap2430_init_late(void)
444 omap_mux_late_init();
445 omap2_common_pm_late_init();
447 omap2_clk_enable_autoidle_all();
452 * Currently only board-omap3beagle.c should call this because of the
453 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
455 #ifdef CONFIG_ARCH_OMAP3
456 void __init omap3_init_early(void)
458 omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
459 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
460 OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
461 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
463 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
464 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
465 omap3xxx_check_revision();
466 omap3xxx_check_features();
469 omap3xxx_voltagedomains_init();
470 omap3xxx_powerdomains_init();
471 omap3xxx_clockdomains_init();
472 omap3xxx_hwmod_init();
473 omap_hwmod_init_postsetup();
477 void __init omap3430_init_early(void)
482 void __init omap35xx_init_early(void)
487 void __init omap3630_init_early(void)
492 void __init am35xx_init_early(void)
497 void __init ti81xx_init_early(void)
499 omap2_set_globals_tap(OMAP343X_CLASS,
500 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
501 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
503 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
504 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
505 omap3xxx_check_revision();
506 ti81xx_check_features();
507 omap3xxx_voltagedomains_init();
508 omap3xxx_powerdomains_init();
509 omap3xxx_clockdomains_init();
510 omap3xxx_hwmod_init();
511 omap_hwmod_init_postsetup();
515 void __init omap3_init_late(void)
517 omap_mux_late_init();
518 omap2_common_pm_late_init();
520 omap2_clk_enable_autoidle_all();
523 void __init omap3430_init_late(void)
525 omap_mux_late_init();
526 omap2_common_pm_late_init();
528 omap2_clk_enable_autoidle_all();
531 void __init omap35xx_init_late(void)
533 omap_mux_late_init();
534 omap2_common_pm_late_init();
536 omap2_clk_enable_autoidle_all();
539 void __init omap3630_init_late(void)
541 omap_mux_late_init();
542 omap2_common_pm_late_init();
544 omap2_clk_enable_autoidle_all();
547 void __init am35xx_init_late(void)
549 omap_mux_late_init();
550 omap2_common_pm_late_init();
552 omap2_clk_enable_autoidle_all();
555 void __init ti81xx_init_late(void)
557 omap_mux_late_init();
558 omap2_common_pm_late_init();
560 omap2_clk_enable_autoidle_all();
564 #ifdef CONFIG_SOC_AM33XX
565 void __init am33xx_init_early(void)
567 omap2_set_globals_tap(AM335X_CLASS,
568 AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
569 omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
571 omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
572 omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
573 omap3xxx_check_revision();
574 ti81xx_check_features();
575 am33xx_voltagedomains_init();
576 am33xx_powerdomains_init();
577 am33xx_clockdomains_init();
579 omap_hwmod_init_postsetup();
584 #ifdef CONFIG_ARCH_OMAP4
585 void __init omap4430_init_early(void)
587 omap2_set_globals_tap(OMAP443X_CLASS,
588 OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
589 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
590 OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
591 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
592 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
593 OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
594 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
595 omap_prm_base_init();
597 omap4xxx_check_revision();
598 omap4xxx_check_features();
600 omap44xx_voltagedomains_init();
601 omap44xx_powerdomains_init();
602 omap44xx_clockdomains_init();
603 omap44xx_hwmod_init();
604 omap_hwmod_init_postsetup();
608 void __init omap4430_init_late(void)
610 omap_mux_late_init();
611 omap2_common_pm_late_init();
613 omap2_clk_enable_autoidle_all();
617 #ifdef CONFIG_SOC_OMAP5
618 void __init omap5_init_early(void)
620 omap2_set_globals_tap(OMAP54XX_CLASS,
621 OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
622 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
623 OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
624 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
625 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
626 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
627 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
628 omap_prm_base_init();
630 omap5xxx_check_revision();
634 void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
635 struct omap_sdrc_params *sdrc_cs1)
639 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
640 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
641 _omap2_init_reprogram_sdrc();