arch/arm/mach-omap2/mcbsp.c

   1 /*
   2  * linux/arch/arm/mach-omap2/mcbsp.c
   3  *
   4  * Copyright (C) 2008 Instituto Nokia de Tecnologia
   5  * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Multichannel mode not supported.
  12  */
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/clk.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/slab.h>
  20 #include <linux/platform_data/asoc-ti-mcbsp.h>
  21
  22 #include <plat/dma.h>
  23 #include <plat/omap_device.h>
  24 #include <linux/pm_runtime.h>
  25
  26 #include "control.h"
  27
  28 /*
  29  * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
  30  * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
  31  */
  32 #include "cm2xxx_3xxx.h"
  33 #include "cm-regbits-34xx.h"
  34
  35 /* McBSP1 internal signal muxing function for OMAP2/3 */
  36 static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
  37                                    const char *src)
  38 {
  39         u32 v;
  40
  41         v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  42
  43         if (!strcmp(signal, "clkr")) {
  44                 if (!strcmp(src, "clkr"))
  45                         v &= ~OMAP2_MCBSP1_CLKR_MASK;
  46                 else if (!strcmp(src, "clkx"))
  47                         v |= OMAP2_MCBSP1_CLKR_MASK;
  48                 else
  49                         return -EINVAL;
  50         } else if (!strcmp(signal, "fsr")) {
  51                 if (!strcmp(src, "fsr"))
  52                         v &= ~OMAP2_MCBSP1_FSR_MASK;
  53                 else if (!strcmp(src, "fsx"))
  54                         v |= OMAP2_MCBSP1_FSR_MASK;
  55                 else
  56                         return -EINVAL;
  57         } else {
  58                 return -EINVAL;
  59         }
  60
  61         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  62
  63         return 0;
  64 }
  65
  66 /* McBSP4 internal signal muxing function for OMAP4 */
  67 #define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX     (1 << 31)
  68 #define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX    (1 << 30)
  69 static int omap4_mcbsp4_mux_rx_clk(struct device *dev, const char *signal,
  70                                    const char *src)
  71 {
  72         u32 v;
  73
  74         /*
  75          * In CONTROL_MCBSPLP register only bit 30 (CLKR mux), and bit 31 (FSR
  76          * mux) is used */
  77         v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
  78
  79         if (!strcmp(signal, "clkr")) {
  80                 if (!strcmp(src, "clkr"))
  81                         v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
  82                 else if (!strcmp(src, "clkx"))
  83                         v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
  84                 else
  85                         return -EINVAL;
  86         } else if (!strcmp(signal, "fsr")) {
  87                 if (!strcmp(src, "fsr"))
  88                         v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
  89                 else if (!strcmp(src, "fsx"))
  90                         v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
  91                 else
  92                         return -EINVAL;
  93         } else {
  94                 return -EINVAL;
  95         }
  96
  97         omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
  98
  99         return 0;
 100 }
 101
 102 /* McBSP CLKS source switching function */
 103 static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
 104                                    const char *src)
 105 {
 106         struct clk *fck_src;
 107         char *fck_src_name;
 108         int r;
 109
 110         if (!strcmp(src, "clks_ext"))
 111                 fck_src_name = "pad_fck";
 112         else if (!strcmp(src, "clks_fclk"))
 113                 fck_src_name = "prcm_fck";
 114         else
 115                 return -EINVAL;
 116
 117         fck_src = clk_get(dev, fck_src_name);
 118         if (IS_ERR_OR_NULL(fck_src)) {
 119                 pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
 120                        fck_src_name);
 121                 return -EINVAL;
 122         }
 123
 124         pm_runtime_put_sync(dev);
 125
 126         r = clk_set_parent(clk, fck_src);
 127         if (IS_ERR_VALUE(r)) {
 128                 pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
 129                        "clks", fck_src_name);
 130                 clk_put(fck_src);
 131                 return -EINVAL;
 132         }
 133
 134         pm_runtime_get_sync(dev);
 135
 136         clk_put(fck_src);
 137
 138         return 0;
 139 }
 140
 141 static int omap3_enable_st_clock(unsigned int id, bool enable)
 142 {
 143         unsigned int w;
 144
 145         /*
 146          * Sidetone uses McBSP ICLK - which must not idle when sidetones
 147          * are enabled or sidetones start sounding ugly.
 148          */
 149         w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
 150         if (enable)
 151                 w &= ~(1 << (id - 2));
 152         else
 153                 w |= 1 << (id - 2);
 154         omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
 155
 156         return 0;
 157 }
 158
 159 static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
 160 {
 161         int id, count = 1;
 162         char *name = "omap-mcbsp";
 163         struct omap_hwmod *oh_device[2];
 164         struct omap_mcbsp_platform_data *pdata = NULL;
 165         struct platform_device *pdev;
 166
 167         sscanf(oh->name, "mcbsp%d", &id);
 168
 169         pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
 170         if (!pdata) {
 171                 pr_err("%s: No memory for mcbsp\n", __func__);
 172                 return -ENOMEM;
 173         }
 174
 175         pdata->reg_step = 4;
 176         if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
 177                 pdata->reg_size = 2;
 178         } else {
 179                 pdata->reg_size = 4;
 180                 pdata->has_ccr = true;
 181         }
 182         pdata->set_clk_src = omap2_mcbsp_set_clk_src;
 183
 184         /* On OMAP2/3 the McBSP1 port has 6 pin configuration */
 185         if (id == 1 && oh->class->rev < MCBSP_CONFIG_TYPE4)
 186                 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
 187
 188         /* On OMAP4 the McBSP4 port has 6 pin configuration */
 189         if (id == 4 && oh->class->rev == MCBSP_CONFIG_TYPE4)
 190                 pdata->mux_signal = omap4_mcbsp4_mux_rx_clk;
 191
 192         if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
 193                 if (id == 2)
 194                         /* The FIFO has 1024 + 256 locations */
 195                         pdata->buffer_size = 0x500;
 196                 else
 197                         /* The FIFO has 128 locations */
 198                         pdata->buffer_size = 0x80;
 199         } else if (oh->class->rev == MCBSP_CONFIG_TYPE4) {
 200                 /* The FIFO has 128 locations for all instances */
 201                 pdata->buffer_size = 0x80;
 202         }
 203
 204         if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
 205                 pdata->has_wakeup = true;
 206
 207         oh_device[0] = oh;
 208
 209         if (oh->dev_attr) {
 210                 oh_device[1] = omap_hwmod_lookup((
 211                 (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
 212                 pdata->enable_st_clock = omap3_enable_st_clock;
 213                 count++;
 214         }
 215         pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
 216                                 sizeof(*pdata), NULL, 0, false);
 217         kfree(pdata);
 218         if (IS_ERR(pdev))  {
 219                 pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
 220                                         name, oh->name);
 221                 return PTR_ERR(pdev);
 222         }
 223         return 0;
 224 }
 225
 226 static int __init omap2_mcbsp_init(void)
 227 {
 228         omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
 229
 230         return 0;
 231 }
 232 arch_initcall(omap2_mcbsp_init);