2 * linux/arch/arm/mach-omap2/mcbsp.c
4 * Copyright (C) 2008 Instituto Nokia de Tecnologia
5 * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Multichannel mode not supported.
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/clk.h>
16 #include <linux/err.h>
18 #include <linux/platform_device.h>
19 #include <linux/slab.h>
20 #include <linux/platform_data/asoc-ti-mcbsp.h>
23 #include <plat/omap_device.h>
24 #include <linux/pm_runtime.h>
29 * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
30 * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
32 #include "cm2xxx_3xxx.h"
33 #include "cm-regbits-34xx.h"
35 /* McBSP1 internal signal muxing function for OMAP2/3 */
36 static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
41 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
43 if (!strcmp(signal, "clkr")) {
44 if (!strcmp(src, "clkr"))
45 v &= ~OMAP2_MCBSP1_CLKR_MASK;
46 else if (!strcmp(src, "clkx"))
47 v |= OMAP2_MCBSP1_CLKR_MASK;
50 } else if (!strcmp(signal, "fsr")) {
51 if (!strcmp(src, "fsr"))
52 v &= ~OMAP2_MCBSP1_FSR_MASK;
53 else if (!strcmp(src, "fsx"))
54 v |= OMAP2_MCBSP1_FSR_MASK;
61 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
66 /* McBSP4 internal signal muxing function for OMAP4 */
67 #define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX (1 << 31)
68 #define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX (1 << 30)
69 static int omap4_mcbsp4_mux_rx_clk(struct device *dev, const char *signal,
75 * In CONTROL_MCBSPLP register only bit 30 (CLKR mux), and bit 31 (FSR
77 v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
79 if (!strcmp(signal, "clkr")) {
80 if (!strcmp(src, "clkr"))
81 v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
82 else if (!strcmp(src, "clkx"))
83 v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
86 } else if (!strcmp(signal, "fsr")) {
87 if (!strcmp(src, "fsr"))
88 v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
89 else if (!strcmp(src, "fsx"))
90 v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
97 omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
102 /* McBSP CLKS source switching function */
103 static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
110 if (!strcmp(src, "clks_ext"))
111 fck_src_name = "pad_fck";
112 else if (!strcmp(src, "clks_fclk"))
113 fck_src_name = "prcm_fck";
117 fck_src = clk_get(dev, fck_src_name);
118 if (IS_ERR_OR_NULL(fck_src)) {
119 pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
124 pm_runtime_put_sync(dev);
126 r = clk_set_parent(clk, fck_src);
127 if (IS_ERR_VALUE(r)) {
128 pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
129 "clks", fck_src_name);
134 pm_runtime_get_sync(dev);
141 static int omap3_enable_st_clock(unsigned int id, bool enable)
146 * Sidetone uses McBSP ICLK - which must not idle when sidetones
147 * are enabled or sidetones start sounding ugly.
149 w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
151 w &= ~(1 << (id - 2));
154 omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
159 static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
162 char *name = "omap-mcbsp";
163 struct omap_hwmod *oh_device[2];
164 struct omap_mcbsp_platform_data *pdata = NULL;
165 struct platform_device *pdev;
167 sscanf(oh->name, "mcbsp%d", &id);
169 pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
171 pr_err("%s: No memory for mcbsp\n", __func__);
176 if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
180 pdata->has_ccr = true;
182 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
184 /* On OMAP2/3 the McBSP1 port has 6 pin configuration */
185 if (id == 1 && oh->class->rev < MCBSP_CONFIG_TYPE4)
186 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
188 /* On OMAP4 the McBSP4 port has 6 pin configuration */
189 if (id == 4 && oh->class->rev == MCBSP_CONFIG_TYPE4)
190 pdata->mux_signal = omap4_mcbsp4_mux_rx_clk;
192 if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
194 /* The FIFO has 1024 + 256 locations */
195 pdata->buffer_size = 0x500;
197 /* The FIFO has 128 locations */
198 pdata->buffer_size = 0x80;
199 } else if (oh->class->rev == MCBSP_CONFIG_TYPE4) {
200 /* The FIFO has 128 locations for all instances */
201 pdata->buffer_size = 0x80;
204 if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
205 pdata->has_wakeup = true;
210 oh_device[1] = omap_hwmod_lookup((
211 (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
212 pdata->enable_st_clock = omap3_enable_st_clock;
215 pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
216 sizeof(*pdata), NULL, 0, false);
219 pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
221 return PTR_ERR(pdev);
226 static int __init omap2_mcbsp_init(void)
228 omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
232 arch_initcall(omap2_mcbsp_init);