2 * linux/arch/arm/mach-omap2/mux.c
4 * OMAP2 and OMAP3 pin multiplexing configurations
6 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
7 * Copyright (C) 2003 - 2008 Nokia Corporation
9 * Written by Tony Lindgren
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/module.h>
27 #include <linux/init.h>
29 #include <linux/spinlock.h>
31 #include <asm/system.h>
33 #include <plat/control.h>
36 #ifdef CONFIG_OMAP_MUX
38 #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
39 #define OMAP_MUX_BASE_SZ 0x5ca
41 static struct omap_mux_cfg arch_mux_cfg;
42 static void __iomem *mux_base;
44 static inline u16 omap_mux_read(u16 reg)
46 if (cpu_is_omap24xx())
47 return __raw_readb(mux_base + reg);
49 return __raw_readw(mux_base + reg);
52 static inline void omap_mux_write(u16 val, u16 reg)
54 if (cpu_is_omap24xx())
55 __raw_writeb(val, mux_base + reg);
57 __raw_writew(val, mux_base + reg);
60 /* NOTE: See mux.h for the enumeration */
62 #ifdef CONFIG_ARCH_OMAP24XX
63 static struct pin_config __initdata_or_module omap24xx_pins[] = {
65 * description mux mux pull pull debug
66 * offset mode ena type
70 MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1)
71 MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1)
72 MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 1, 1)
73 MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1)
75 /* Menelaus interrupt */
76 MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
79 MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
81 /* 24xx GPMC chipselects, wait pin monitoring */
82 MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1)
83 MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1)
84 MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
85 MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
86 MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
87 MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1)
90 MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1)
91 MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1)
92 MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)
93 MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
96 MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
97 MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1)
98 MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
99 MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
100 MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
101 MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
102 MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
103 MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
104 MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
105 MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
106 MUX_CFG_24XX("N15_24XX_GPIO85", 0x103, 3, 0, 0, 1)
107 MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
108 MUX_CFG_24XX("P20_24XX_GPIO93", 0x10b, 3, 0, 0, 1)
109 MUX_CFG_24XX("P18_24XX_GPIO95", 0x10d, 3, 0, 0, 1)
110 MUX_CFG_24XX("M18_24XX_GPIO96", 0x10e, 3, 0, 0, 1)
111 MUX_CFG_24XX("L14_24XX_GPIO97", 0x10f, 3, 0, 0, 1)
112 MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1)
113 MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
114 MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1)
117 MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
118 MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1)
119 MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1)
120 MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1)
121 MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1)
122 MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1)
123 MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1)
124 MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1)
125 MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1)
126 MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1)
128 /* 24xx external DMA requests */
129 MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1)
130 MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1)
131 MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1)
132 MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
133 MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
134 MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
137 MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
138 MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
141 MUX_CFG_24XX("G19_24XX_MMC_CLKO", 0x0f3, 0, 0, 0, 1)
142 MUX_CFG_24XX("H18_24XX_MMC_CMD", 0x0f4, 0, 0, 0, 1)
143 MUX_CFG_24XX("F20_24XX_MMC_DAT0", 0x0f5, 0, 0, 0, 1)
144 MUX_CFG_24XX("H14_24XX_MMC_DAT1", 0x0f6, 0, 0, 0, 1)
145 MUX_CFG_24XX("E19_24XX_MMC_DAT2", 0x0f7, 0, 0, 0, 1)
146 MUX_CFG_24XX("D19_24XX_MMC_DAT3", 0x0f8, 0, 0, 0, 1)
147 MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0", 0x0f9, 0, 0, 0, 1)
148 MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1", 0x0fa, 0, 0, 0, 1)
149 MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2", 0x0fb, 0, 0, 0, 1)
150 MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1)
151 MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1)
152 MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1)
155 MUX_CFG_24XX("J20_24XX_USB0_PUEN", 0x11d, 0, 0, 0, 1)
156 MUX_CFG_24XX("J19_24XX_USB0_VP", 0x11e, 0, 0, 0, 1)
157 MUX_CFG_24XX("K20_24XX_USB0_VM", 0x11f, 0, 0, 0, 1)
158 MUX_CFG_24XX("J18_24XX_USB0_RCV", 0x120, 0, 0, 0, 1)
159 MUX_CFG_24XX("K19_24XX_USB0_TXEN", 0x121, 0, 0, 0, 1)
160 MUX_CFG_24XX("J14_24XX_USB0_SE0", 0x122, 0, 0, 0, 1)
161 MUX_CFG_24XX("K18_24XX_USB0_DAT", 0x123, 0, 0, 0, 1)
163 MUX_CFG_24XX("N14_24XX_USB1_SE0", 0x0ed, 2, 0, 0, 1)
164 MUX_CFG_24XX("W12_24XX_USB1_SE0", 0x0dd, 3, 0, 0, 1)
165 MUX_CFG_24XX("P15_24XX_USB1_DAT", 0x0ee, 2, 0, 0, 1)
166 MUX_CFG_24XX("R13_24XX_USB1_DAT", 0x0e0, 3, 0, 0, 1)
167 MUX_CFG_24XX("W20_24XX_USB1_TXEN", 0x0ec, 2, 0, 0, 1)
168 MUX_CFG_24XX("P13_24XX_USB1_TXEN", 0x0df, 3, 0, 0, 1)
169 MUX_CFG_24XX("V19_24XX_USB1_RCV", 0x0eb, 2, 0, 0, 1)
170 MUX_CFG_24XX("V12_24XX_USB1_RCV", 0x0de, 3, 0, 0, 1)
172 MUX_CFG_24XX("AA10_24XX_USB2_SE0", 0x0e5, 2, 0, 0, 1)
173 MUX_CFG_24XX("Y11_24XX_USB2_DAT", 0x0e8, 2, 0, 0, 1)
174 MUX_CFG_24XX("AA12_24XX_USB2_TXEN", 0x0e9, 2, 0, 0, 1)
175 MUX_CFG_24XX("AA6_24XX_USB2_RCV", 0x0e6, 2, 0, 0, 1)
176 MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0", 0x0e7, 2, 0, 0, 1)
179 MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
180 MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
181 MUX_CFG_24XX("V18_24XX_KBR2", 0x139, 3, 1, 1, 1)
182 MUX_CFG_24XX("M21_24XX_KBR3", 0xc9, 3, 1, 1, 1)
183 MUX_CFG_24XX("E5__24XX_KBR4", 0x138, 3, 1, 1, 1)
184 MUX_CFG_24XX("M18_24XX_KBR5", 0x10e, 3, 1, 1, 1)
185 MUX_CFG_24XX("R20_24XX_KBC0", 0x108, 3, 0, 0, 1)
186 MUX_CFG_24XX("M14_24XX_KBC1", 0x109, 3, 0, 0, 1)
187 MUX_CFG_24XX("H19_24XX_KBC2", 0x114, 3, 0, 0, 1)
188 MUX_CFG_24XX("V17_24XX_KBC3", 0x135, 3, 0, 0, 1)
189 MUX_CFG_24XX("P21_24XX_KBC4", 0xca, 3, 0, 0, 1)
190 MUX_CFG_24XX("L14_24XX_KBC5", 0x10f, 3, 0, 0, 1)
191 MUX_CFG_24XX("N19_24XX_KBC6", 0x110, 3, 0, 0, 1)
193 /* 24xx Menelaus Keypad GPIO */
194 MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1)
195 MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1)
196 MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1)
199 MUX_CFG_24XX("AD9_2430_USB0_PUEN", 0x133, 4, 0, 0, 1)
200 MUX_CFG_24XX("Y11_2430_USB0_VP", 0x134, 4, 0, 0, 1)
201 MUX_CFG_24XX("AD7_2430_USB0_VM", 0x135, 4, 0, 0, 1)
202 MUX_CFG_24XX("AE7_2430_USB0_RCV", 0x136, 4, 0, 0, 1)
203 MUX_CFG_24XX("AD4_2430_USB0_TXEN", 0x137, 4, 0, 0, 1)
204 MUX_CFG_24XX("AF9_2430_USB0_SE0", 0x138, 4, 0, 0, 1)
205 MUX_CFG_24XX("AE6_2430_USB0_DAT", 0x139, 4, 0, 0, 1)
206 MUX_CFG_24XX("AD24_2430_USB1_SE0", 0x107, 2, 0, 0, 1)
207 MUX_CFG_24XX("AB24_2430_USB1_RCV", 0x108, 2, 0, 0, 1)
208 MUX_CFG_24XX("Y25_2430_USB1_TXEN", 0x109, 2, 0, 0, 1)
209 MUX_CFG_24XX("AA26_2430_USB1_DAT", 0x10A, 2, 0, 0, 1)
212 MUX_CFG_24XX("AD9_2430_USB0HS_DATA3", 0x133, 0, 0, 0, 1)
213 MUX_CFG_24XX("Y11_2430_USB0HS_DATA4", 0x134, 0, 0, 0, 1)
214 MUX_CFG_24XX("AD7_2430_USB0HS_DATA5", 0x135, 0, 0, 0, 1)
215 MUX_CFG_24XX("AE7_2430_USB0HS_DATA6", 0x136, 0, 0, 0, 1)
216 MUX_CFG_24XX("AD4_2430_USB0HS_DATA2", 0x137, 0, 0, 0, 1)
217 MUX_CFG_24XX("AF9_2430_USB0HS_DATA0", 0x138, 0, 0, 0, 1)
218 MUX_CFG_24XX("AE6_2430_USB0HS_DATA1", 0x139, 0, 0, 0, 1)
219 MUX_CFG_24XX("AE8_2430_USB0HS_CLK", 0x13A, 0, 0, 0, 1)
220 MUX_CFG_24XX("AD8_2430_USB0HS_DIR", 0x13B, 0, 0, 0, 1)
221 MUX_CFG_24XX("AE5_2430_USB0HS_STP", 0x13c, 0, 1, 1, 1)
222 MUX_CFG_24XX("AE9_2430_USB0HS_NXT", 0x13D, 0, 0, 0, 1)
223 MUX_CFG_24XX("AC7_2430_USB0HS_DATA7", 0x13E, 0, 0, 0, 1)
226 MUX_CFG_24XX("AD6_2430_MCBSP_CLKS", 0x011E, 0, 0, 0, 1)
228 MUX_CFG_24XX("AB2_2430_MCBSP1_CLKR", 0x011A, 0, 0, 0, 1)
229 MUX_CFG_24XX("AD5_2430_MCBSP1_FSR", 0x011B, 0, 0, 0, 1)
230 MUX_CFG_24XX("AA1_2430_MCBSP1_DX", 0x011C, 0, 0, 0, 1)
231 MUX_CFG_24XX("AF3_2430_MCBSP1_DR", 0x011D, 0, 0, 0, 1)
232 MUX_CFG_24XX("AB3_2430_MCBSP1_FSX", 0x011F, 0, 0, 0, 1)
233 MUX_CFG_24XX("Y9_2430_MCBSP1_CLKX", 0x0120, 0, 0, 0, 1)
235 MUX_CFG_24XX("AC10_2430_MCBSP2_FSX", 0x012E, 1, 0, 0, 1)
236 MUX_CFG_24XX("AD16_2430_MCBSP2_CLX", 0x012F, 1, 0, 0, 1)
237 MUX_CFG_24XX("AE13_2430_MCBSP2_DX", 0x0130, 1, 0, 0, 1)
238 MUX_CFG_24XX("AD13_2430_MCBSP2_DR", 0x0131, 1, 0, 0, 1)
239 MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0, 0, 0, 1)
240 MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1)
241 MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1)
242 MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
244 MUX_CFG_24XX("AC9_2430_MCBSP3_CLKX", 0x0103, 0, 0, 0, 1)
245 MUX_CFG_24XX("AE4_2430_MCBSP3_FSX", 0x0104, 0, 0, 0, 1)
246 MUX_CFG_24XX("AE2_2430_MCBSP3_DR", 0x0105, 0, 0, 0, 1)
247 MUX_CFG_24XX("AF4_2430_MCBSP3_DX", 0x0106, 0, 0, 0, 1)
249 MUX_CFG_24XX("N3_2430_MCBSP4_CLKX", 0x010B, 1, 0, 0, 1)
250 MUX_CFG_24XX("AD23_2430_MCBSP4_DR", 0x010C, 1, 0, 0, 1)
251 MUX_CFG_24XX("AB25_2430_MCBSP4_DX", 0x010D, 1, 0, 0, 1)
252 MUX_CFG_24XX("AC25_2430_MCBSP4_FSX", 0x010E, 1, 0, 0, 1)
254 MUX_CFG_24XX("AE16_2430_MCBSP5_CLKX", 0x00ED, 1, 0, 0, 1)
255 MUX_CFG_24XX("AF12_2430_MCBSP5_FSX", 0x00ED, 1, 0, 0, 1)
256 MUX_CFG_24XX("K7_2430_MCBSP5_DX", 0x00EF, 1, 0, 0, 1)
257 MUX_CFG_24XX("M1_2430_MCBSP5_DR", 0x00F0, 1, 0, 0, 1)
260 MUX_CFG_24XX("Y18_2430_MCSPI1_CLK", 0x010F, 0, 0, 0, 1)
261 MUX_CFG_24XX("AD15_2430_MCSPI1_SIMO", 0x0110, 0, 0, 0, 1)
262 MUX_CFG_24XX("AE17_2430_MCSPI1_SOMI", 0x0111, 0, 0, 0, 1)
263 MUX_CFG_24XX("U1_2430_MCSPI1_CS0", 0x0112, 0, 0, 0, 1)
265 /* Touchscreen GPIO */
266 MUX_CFG_24XX("AF19_2430_GPIO_85", 0x0113, 3, 0, 0, 1)
270 #define OMAP24XX_PINS_SZ ARRAY_SIZE(omap24xx_pins)
273 #define omap24xx_pins NULL
274 #define OMAP24XX_PINS_SZ 0
275 #endif /* CONFIG_ARCH_OMAP24XX */
277 #ifdef CONFIG_ARCH_OMAP34XX
278 static struct pin_config __initdata_or_module omap34xx_pins[] = {
281 * mux-mode | [active-mode | off-mode]
285 MUX_CFG_34XX("K21_34XX_I2C1_SCL", 0x1ba,
286 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
287 MUX_CFG_34XX("J21_34XX_I2C1_SDA", 0x1bc,
288 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
289 MUX_CFG_34XX("AF15_34XX_I2C2_SCL", 0x1be,
290 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
291 MUX_CFG_34XX("AE15_34XX_I2C2_SDA", 0x1c0,
292 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
293 MUX_CFG_34XX("AF14_34XX_I2C3_SCL", 0x1c2,
294 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
295 MUX_CFG_34XX("AG14_34XX_I2C3_SDA", 0x1c4,
296 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
297 MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00,
298 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
299 MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02,
300 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
302 /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
303 MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da,
304 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
305 MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8,
306 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
307 MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec,
308 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
309 MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee,
310 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
311 MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc,
312 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
313 MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de,
314 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
315 MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0,
316 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
317 MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea,
318 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
319 MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4,
320 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
321 MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6,
322 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
323 MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8,
324 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
325 MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2,
326 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
328 /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
329 MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0,
330 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
331 MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2,
332 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
333 MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4,
334 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
335 MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6,
336 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
337 MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8,
338 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
339 MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa,
340 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
341 MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4,
342 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
343 MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de,
344 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
345 MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8,
346 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
347 MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da,
348 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
349 MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc,
350 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
351 MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6,
352 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
354 /* TLL - HSUSB: 12-pin TLL Port 1*/
355 MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da,
356 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
357 MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8,
358 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
359 MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec,
360 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
361 MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee,
362 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
363 MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc,
364 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
365 MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de,
366 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
367 MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0,
368 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
369 MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea,
370 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
371 MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4,
372 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
373 MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6,
374 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
375 MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8,
376 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
377 MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2,
378 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
380 /* TLL - HSUSB: 12-pin TLL Port 2*/
381 MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0,
382 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
383 MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2,
384 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
385 MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4,
386 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
387 MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6,
388 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
389 MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8,
390 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
391 MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa,
392 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
393 MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4,
394 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
395 MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de,
396 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
397 MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8,
398 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
399 MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da,
400 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
401 MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc,
402 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
403 MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6,
404 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
406 /* TLL - HSUSB: 12-pin TLL Port 3*/
407 MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180,
408 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
409 MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166,
410 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLUP)
411 MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168,
412 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
413 MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a,
414 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
415 MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186,
416 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
417 MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184,
418 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
419 MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188,
420 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
421 MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a,
422 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
423 MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c,
424 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
425 MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e,
426 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
427 MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170,
428 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
429 MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172,
430 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
432 /* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */
433 MUX_CFG_34XX("AF10_3430_USB1FS_PHY_MM1_RXDP", 0x5d8,
434 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
435 MUX_CFG_34XX("AG9_3430_USB1FS_PHY_MM1_RXDM", 0x5ee,
436 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
437 MUX_CFG_34XX("W13_3430_USB1FS_PHY_MM1_RXRCV", 0x5dc,
438 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
439 MUX_CFG_34XX("W12_3430_USB1FS_PHY_MM1_TXSE0", 0x5de,
440 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
441 MUX_CFG_34XX("W11_3430_USB1FS_PHY_MM1_TXDAT", 0x5e0,
442 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
443 MUX_CFG_34XX("Y11_3430_USB1FS_PHY_MM1_TXEN_N", 0x5ea,
444 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
446 /* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */
447 MUX_CFG_34XX("AF7_3430_USB2FS_PHY_MM2_RXDP", 0x5f2,
448 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
449 MUX_CFG_34XX("AH7_3430_USB2FS_PHY_MM2_RXDM", 0x5f6,
450 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
451 MUX_CFG_34XX("AB10_3430_USB2FS_PHY_MM2_RXRCV", 0x5f8,
452 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
453 MUX_CFG_34XX("AB9_3430_USB2FS_PHY_MM2_TXSE0", 0x5fa,
454 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
455 MUX_CFG_34XX("W3_3430_USB2FS_PHY_MM2_TXDAT", 0x1d4,
456 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
457 MUX_CFG_34XX("T4_3430_USB2FS_PHY_MM2_TXEN_N", 0x1de,
458 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
460 /* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */
461 MUX_CFG_34XX("AH3_3430_USB3FS_PHY_MM3_RXDP", 0x166,
462 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
463 MUX_CFG_34XX("AE3_3430_USB3FS_PHY_MM3_RXDM", 0x16a,
464 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
465 MUX_CFG_34XX("AD1_3430_USB3FS_PHY_MM3_RXRCV", 0x186,
466 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
467 MUX_CFG_34XX("AE1_3430_USB3FS_PHY_MM3_TXSE0", 0x184,
468 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
469 MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188,
470 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
471 MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
472 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
475 /* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix.
476 * (Always specify PIN_INPUT, except for names suffixed by "_OUT".)
477 * No internal pullup/pulldown without "_UP" or "_DOWN" suffix.
479 MUX_CFG_34XX("AF26_34XX_GPIO0", 0x1e0,
480 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
481 MUX_CFG_34XX("AF22_34XX_GPIO9", 0xa18,
482 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
483 MUX_CFG_34XX("AG9_34XX_GPIO23", 0x5ee,
484 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
485 MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
486 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
487 MUX_CFG_34XX("U8_34XX_GPIO54_OUT", 0x0b4,
488 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
489 MUX_CFG_34XX("U8_34XX_GPIO54_DOWN", 0x0b4,
490 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN)
491 MUX_CFG_34XX("L8_34XX_GPIO63", 0x0ce,
492 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
493 MUX_CFG_34XX("G25_34XX_GPIO86_OUT", 0x0fc,
494 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
495 MUX_CFG_34XX("AG4_34XX_GPIO134_OUT", 0x160,
496 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
497 MUX_CFG_34XX("AF4_34XX_GPIO135_OUT", 0x162,
498 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
499 MUX_CFG_34XX("AE4_34XX_GPIO136_OUT", 0x164,
500 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
501 MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
502 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
503 MUX_CFG_34XX("AE6_34XX_GPIO141", 0x16e,
504 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
505 MUX_CFG_34XX("AF5_34XX_GPIO142", 0x170,
506 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
507 MUX_CFG_34XX("AE5_34XX_GPIO143", 0x172,
508 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
509 MUX_CFG_34XX("H19_34XX_GPIO164_OUT", 0x19c,
510 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
511 MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
512 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
514 /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
515 MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262,
516 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
517 MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264,
518 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
521 MUX_CFG_34XX("N28_3430_MMC1_CLK", 0x144,
522 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
523 MUX_CFG_34XX("M27_3430_MMC1_CMD", 0x146,
524 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
525 MUX_CFG_34XX("N27_3430_MMC1_DAT0", 0x148,
526 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
527 MUX_CFG_34XX("N26_3430_MMC1_DAT1", 0x14a,
528 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
529 MUX_CFG_34XX("N25_3430_MMC1_DAT2", 0x14c,
530 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
531 MUX_CFG_34XX("P28_3430_MMC1_DAT3", 0x14e,
532 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
533 MUX_CFG_34XX("P27_3430_MMC1_DAT4", 0x150,
534 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
535 MUX_CFG_34XX("P26_3430_MMC1_DAT5", 0x152,
536 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
537 MUX_CFG_34XX("R27_3430_MMC1_DAT6", 0x154,
538 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
539 MUX_CFG_34XX("R25_3430_MMC1_DAT7", 0x156,
540 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
543 MUX_CFG_34XX("AE2_3430_MMC2_CLK", 0x158,
544 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
545 MUX_CFG_34XX("AG5_3430_MMC2_CMD", 0x15A,
546 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
547 MUX_CFG_34XX("AH5_3430_MMC2_DAT0", 0x15c,
548 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
549 MUX_CFG_34XX("AH4_3430_MMC2_DAT1", 0x15e,
550 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
551 MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160,
552 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
553 MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162,
554 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
555 MUX_CFG_34XX("AE4_3430_MMC2_DAT4", 0x164,
556 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
557 MUX_CFG_34XX("AH3_3430_MMC2_DAT5", 0x166,
558 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
559 MUX_CFG_34XX("AF3_3430_MMC2_DAT6", 0x168,
560 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
561 MUX_CFG_34XX("AE3_3430_MMC2_DAT7", 0x16A,
562 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
565 MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8,
566 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
567 MUX_CFG_34XX("AC3_3430_MMC3_CMD", 0x1d0,
568 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLUP)
569 MUX_CFG_34XX("AE11_3430_MMC3_DAT0", 0x5e4,
570 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
571 MUX_CFG_34XX("AH9_3430_MMC3_DAT1", 0x5e6,
572 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
573 MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8,
574 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
575 MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2,
576 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
578 /* SYS_NIRQ T2 INT1 */
579 MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0,
580 OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP |
582 /* EHCI GPIO's on OMAP3EVM (Rev >= E) */
583 MUX_CFG_34XX("AH14_34XX_GPIO21", 0x5ea,
584 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
585 MUX_CFG_34XX("AF9_34XX_GPIO22", 0x5ec,
586 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
587 MUX_CFG_34XX("U3_34XX_GPIO61", 0x0c8,
588 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
591 #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
594 #define omap34xx_pins NULL
595 #define OMAP34XX_PINS_SZ 0
596 #endif /* CONFIG_ARCH_OMAP34XX */
598 #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
599 static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg)
602 u8 warn = 0, debug = 0;
604 orig = omap_mux_read(cfg->mux_reg - OMAP_MUX_BASE_OFFSET);
606 #ifdef CONFIG_OMAP_MUX_DEBUG
609 warn = (orig != reg);
612 "MUX: setup %s (0x%p): 0x%04x -> 0x%04x\n",
613 cfg->name, omap_ctrl_base_get() + cfg->mux_reg,
617 #define omap2_cfg_debug(x, y) do {} while (0)
620 #ifdef CONFIG_ARCH_OMAP24XX
621 static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
623 static DEFINE_SPINLOCK(mux_spin_lock);
627 spin_lock_irqsave(&mux_spin_lock, flags);
628 reg |= cfg->mask & 0x7;
630 reg |= OMAP2_PULL_ENA;
632 reg |= OMAP2_PULL_UP;
633 omap2_cfg_debug(cfg, reg);
634 omap_mux_write(reg, cfg->mux_reg - OMAP_MUX_BASE_OFFSET);
635 spin_unlock_irqrestore(&mux_spin_lock, flags);
640 #define omap24xx_cfg_reg NULL
643 #ifdef CONFIG_ARCH_OMAP34XX
644 static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
646 static DEFINE_SPINLOCK(mux_spin_lock);
650 spin_lock_irqsave(&mux_spin_lock, flags);
652 omap2_cfg_debug(cfg, reg);
653 omap_mux_write(reg, cfg->mux_reg - OMAP_MUX_BASE_OFFSET);
654 spin_unlock_irqrestore(&mux_spin_lock, flags);
659 #define omap34xx_cfg_reg NULL
662 int __init omap2_mux_init(void)
666 if (cpu_is_omap2420())
667 mux_pbase = OMAP2420_CTRL_BASE + OMAP_MUX_BASE_OFFSET;
668 else if (cpu_is_omap2430())
669 mux_pbase = OMAP243X_CTRL_BASE + OMAP_MUX_BASE_OFFSET;
670 else if (cpu_is_omap34xx())
671 mux_pbase = OMAP343X_CTRL_BASE + OMAP_MUX_BASE_OFFSET;
673 mux_base = ioremap(mux_pbase, OMAP_MUX_BASE_SZ);
675 printk(KERN_ERR "mux: Could not ioremap\n");
679 if (cpu_is_omap24xx()) {
680 arch_mux_cfg.pins = omap24xx_pins;
681 arch_mux_cfg.size = OMAP24XX_PINS_SZ;
682 arch_mux_cfg.cfg_reg = omap24xx_cfg_reg;
683 } else if (cpu_is_omap34xx()) {
684 arch_mux_cfg.pins = omap34xx_pins;
685 arch_mux_cfg.size = OMAP34XX_PINS_SZ;
686 arch_mux_cfg.cfg_reg = omap34xx_cfg_reg;
689 return omap_mux_register(&arch_mux_cfg);