2 * OMAP4 specific common source file.
4 * Copyright (C) 2010 Texas Instruments, Inc.
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
9 * This program is free software,you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
17 #include <linux/platform_device.h>
19 #include <asm/hardware/gic.h>
20 #include <asm/hardware/cache-l2x0.h>
22 #include <plat/irqs.h>
24 #include <mach/hardware.h>
25 #include <mach/omap-wakeupgen.h>
28 #include "omap4-sar-layout.h"
30 #ifdef CONFIG_CACHE_L2X0
31 static void __iomem *l2cache_base;
34 static void __iomem *sar_ram_base;
36 void __init gic_init_irq(void)
38 void __iomem *omap_irq_base;
39 void __iomem *gic_dist_base_addr;
41 /* Static mapping, never released */
42 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
43 BUG_ON(!gic_dist_base_addr);
45 /* Static mapping, never released */
46 omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
47 BUG_ON(!omap_irq_base);
49 omap_wakeupgen_init();
51 gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
54 #ifdef CONFIG_CACHE_L2X0
56 void __iomem *omap4_get_l2cache_base(void)
61 static void omap4_l2x0_disable(void)
63 /* Disable PL310 L2 Cache controller */
64 omap_smc1(0x102, 0x0);
67 static void omap4_l2x0_set_debug(unsigned long val)
69 /* Program PL310 L2 Cache controller debug register */
70 omap_smc1(0x100, val);
73 static int __init omap_l2_cache_init(void)
78 * To avoid code running on other OMAPs in
81 if (!cpu_is_omap44xx())
84 /* Static mapping, never released */
85 l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
86 if (WARN_ON(!l2cache_base))
90 * 16-way associativity, parity disabled
91 * Way size - 32KB (es1.0)
92 * Way size - 64KB (es2.0 +)
94 aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
96 (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) |
97 (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT));
99 if (omap_rev() == OMAP4430_REV_ES1_0) {
100 aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
102 aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
103 (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
104 (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
105 (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) |
106 (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT));
108 if (omap_rev() != OMAP4430_REV_ES1_0)
109 omap_smc1(0x109, aux_ctrl);
111 /* Enable PL310 L2 Cache controller */
112 omap_smc1(0x102, 0x1);
114 l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
117 * Override default outer_cache.disable with a OMAP4
120 outer_cache.disable = omap4_l2x0_disable;
121 outer_cache.set_debug = omap4_l2x0_set_debug;
125 early_initcall(omap_l2_cache_init);
128 void __iomem *omap4_get_sar_ram_base(void)
134 * SAR RAM used to save and restore the HW
135 * context in low power modes
137 static int __init omap4_sar_ram_init(void)
140 * To avoid code running on other OMAPs in
143 if (!cpu_is_omap44xx())
146 /* Static mapping, never released */
147 sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K);
148 if (WARN_ON(!sar_ram_base))
153 early_initcall(omap4_sar_ram_init);