arch/arm/mach-omap2/omap_hwmod_2430_data.c

   1 /*
   2  * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
   3  *
   4  * Copyright (C) 2009-2010 Nokia Corporation
   5  * Paul Walmsley
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * XXX handle crossbar/shared link difference for L3?
  12  * XXX these should be marked initdata for multi-OMAP kernels
  13  */
  14 #include <plat/omap_hwmod.h>
  15 #include <mach/irqs.h>
  16 #include <plat/cpu.h>
  17 #include <plat/dma.h>
  18 #include <plat/serial.h>
  19
  20 #include "omap_hwmod_common_data.h"
  21
  22 #include "prm-regbits-24xx.h"
  23
  24 /*
  25  * OMAP2430 hardware module integration data
  26  *
  27  * ALl of the data in this section should be autogeneratable from the
  28  * TI hardware database or other technical documentation.  Data that
  29  * is driver-specific or driver-kernel integration-specific belongs
  30  * elsewhere.
  31  */
  32
  33 static struct omap_hwmod omap2430_mpu_hwmod;
  34 static struct omap_hwmod omap2430_iva_hwmod;
  35 static struct omap_hwmod omap2430_l3_main_hwmod;
  36 static struct omap_hwmod omap2430_l4_core_hwmod;
  37
  38 /* L3 -> L4_CORE interface */
  39 static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
  40         .master = &omap2430_l3_main_hwmod,
  41         .slave  = &omap2430_l4_core_hwmod,
  42         .user   = OCP_USER_MPU | OCP_USER_SDMA,
  43 };
  44
  45 /* MPU -> L3 interface */
  46 static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {
  47         .master = &omap2430_mpu_hwmod,
  48         .slave  = &omap2430_l3_main_hwmod,
  49         .user   = OCP_USER_MPU,
  50 };
  51
  52 /* Slave interfaces on the L3 interconnect */
  53 static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {
  54         &omap2430_mpu__l3_main,
  55 };
  56
  57 /* Master interfaces on the L3 interconnect */
  58 static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {
  59         &omap2430_l3_main__l4_core,
  60 };
  61
  62 /* L3 */
  63 static struct omap_hwmod omap2430_l3_main_hwmod = {
  64         .name           = "l3_main",
  65         .class          = &l3_hwmod_class,
  66         .masters        = omap2430_l3_main_masters,
  67         .masters_cnt    = ARRAY_SIZE(omap2430_l3_main_masters),
  68         .slaves         = omap2430_l3_main_slaves,
  69         .slaves_cnt     = ARRAY_SIZE(omap2430_l3_main_slaves),
  70         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
  71         .flags          = HWMOD_NO_IDLEST,
  72 };
  73
  74 static struct omap_hwmod omap2430_l4_wkup_hwmod;
  75 static struct omap_hwmod omap2430_uart1_hwmod;
  76 static struct omap_hwmod omap2430_uart2_hwmod;
  77 static struct omap_hwmod omap2430_uart3_hwmod;
  78
  79 /* L4_CORE -> L4_WKUP interface */
  80 static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
  81         .master = &omap2430_l4_core_hwmod,
  82         .slave  = &omap2430_l4_wkup_hwmod,
  83         .user   = OCP_USER_MPU | OCP_USER_SDMA,
  84 };
  85
  86 /* L4 CORE -> UART1 interface */
  87 static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = {
  88         {
  89                 .pa_start       = OMAP2_UART1_BASE,
  90                 .pa_end         = OMAP2_UART1_BASE + SZ_8K - 1,
  91                 .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  92         },
  93 };
  94
  95 static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
  96         .master         = &omap2430_l4_core_hwmod,
  97         .slave          = &omap2430_uart1_hwmod,
  98         .clk            = "uart1_ick",
  99         .addr           = omap2430_uart1_addr_space,
 100         .addr_cnt       = ARRAY_SIZE(omap2430_uart1_addr_space),
 101         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 102 };
 103
 104 /* L4 CORE -> UART2 interface */
 105 static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = {
 106         {
 107                 .pa_start       = OMAP2_UART2_BASE,
 108                 .pa_end         = OMAP2_UART2_BASE + SZ_1K - 1,
 109                 .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
 110         },
 111 };
 112
 113 static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
 114         .master         = &omap2430_l4_core_hwmod,
 115         .slave          = &omap2430_uart2_hwmod,
 116         .clk            = "uart2_ick",
 117         .addr           = omap2430_uart2_addr_space,
 118         .addr_cnt       = ARRAY_SIZE(omap2430_uart2_addr_space),
 119         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 120 };
 121
 122 /* L4 PER -> UART3 interface */
 123 static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = {
 124         {
 125                 .pa_start       = OMAP2_UART3_BASE,
 126                 .pa_end         = OMAP2_UART3_BASE + SZ_1K - 1,
 127                 .flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
 128         },
 129 };
 130
 131 static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
 132         .master         = &omap2430_l4_core_hwmod,
 133         .slave          = &omap2430_uart3_hwmod,
 134         .clk            = "uart3_ick",
 135         .addr           = omap2430_uart3_addr_space,
 136         .addr_cnt       = ARRAY_SIZE(omap2430_uart3_addr_space),
 137         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 138 };
 139
 140 /* Slave interfaces on the L4_CORE interconnect */
 141 static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
 142         &omap2430_l3_main__l4_core,
 143 };
 144
 145 /* Master interfaces on the L4_CORE interconnect */
 146 static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
 147         &omap2430_l4_core__l4_wkup,
 148 };
 149
 150 /* L4 CORE */
 151 static struct omap_hwmod omap2430_l4_core_hwmod = {
 152         .name           = "l4_core",
 153         .class          = &l4_hwmod_class,
 154         .masters        = omap2430_l4_core_masters,
 155         .masters_cnt    = ARRAY_SIZE(omap2430_l4_core_masters),
 156         .slaves         = omap2430_l4_core_slaves,
 157         .slaves_cnt     = ARRAY_SIZE(omap2430_l4_core_slaves),
 158         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 159         .flags          = HWMOD_NO_IDLEST,
 160 };
 161
 162 /* Slave interfaces on the L4_WKUP interconnect */
 163 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
 164         &omap2430_l4_core__l4_wkup,
 165         &omap2_l4_core__uart1,
 166         &omap2_l4_core__uart2,
 167         &omap2_l4_core__uart3,
 168 };
 169
 170 /* Master interfaces on the L4_WKUP interconnect */
 171 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
 172 };
 173
 174 /* L4 WKUP */
 175 static struct omap_hwmod omap2430_l4_wkup_hwmod = {
 176         .name           = "l4_wkup",
 177         .class          = &l4_hwmod_class,
 178         .masters        = omap2430_l4_wkup_masters,
 179         .masters_cnt    = ARRAY_SIZE(omap2430_l4_wkup_masters),
 180         .slaves         = omap2430_l4_wkup_slaves,
 181         .slaves_cnt     = ARRAY_SIZE(omap2430_l4_wkup_slaves),
 182         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 183         .flags          = HWMOD_NO_IDLEST,
 184 };
 185
 186 /* Master interfaces on the MPU device */
 187 static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
 188         &omap2430_mpu__l3_main,
 189 };
 190
 191 /* MPU */
 192 static struct omap_hwmod omap2430_mpu_hwmod = {
 193         .name           = "mpu",
 194         .class          = &mpu_hwmod_class,
 195         .main_clk       = "mpu_ck",
 196         .masters        = omap2430_mpu_masters,
 197         .masters_cnt    = ARRAY_SIZE(omap2430_mpu_masters),
 198         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 199 };
 200
 201 /*
 202  * IVA2_1 interface data
 203  */
 204
 205 /* IVA2 <- L3 interface */
 206 static struct omap_hwmod_ocp_if omap2430_l3__iva = {
 207         .master         = &omap2430_l3_main_hwmod,
 208         .slave          = &omap2430_iva_hwmod,
 209         .clk            = "dsp_fck",
 210         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 211 };
 212
 213 static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = {
 214         &omap2430_l3__iva,
 215 };
 216
 217 /*
 218  * IVA2 (IVA2)
 219  */
 220
 221 static struct omap_hwmod omap2430_iva_hwmod = {
 222         .name           = "iva",
 223         .class          = &iva_hwmod_class,
 224         .masters        = omap2430_iva_masters,
 225         .masters_cnt    = ARRAY_SIZE(omap2430_iva_masters),
 226         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 227 };
 228
 229 /* UART */
 230
 231 static struct omap_hwmod_class_sysconfig uart_sysc = {
 232         .rev_offs       = 0x50,
 233         .sysc_offs      = 0x54,
 234         .syss_offs      = 0x58,
 235         .sysc_flags     = (SYSC_HAS_SIDLEMODE |
 236                            SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
 237                            SYSC_HAS_AUTOIDLE),
 238         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
 239         .sysc_fields    = &omap_hwmod_sysc_type1,
 240 };
 241
 242 static struct omap_hwmod_class uart_class = {
 243         .name = "uart",
 244         .sysc = &uart_sysc,
 245 };
 246
 247 /* UART1 */
 248
 249 static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
 250         { .irq = INT_24XX_UART1_IRQ, },
 251 };
 252
 253 static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
 254         { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
 255         { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
 256 };
 257
 258 static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
 259         &omap2_l4_core__uart1,
 260 };
 261
 262 static struct omap_hwmod omap2430_uart1_hwmod = {
 263         .name           = "uart1",
 264         .mpu_irqs       = uart1_mpu_irqs,
 265         .mpu_irqs_cnt   = ARRAY_SIZE(uart1_mpu_irqs),
 266         .sdma_reqs      = uart1_sdma_reqs,
 267         .sdma_reqs_cnt  = ARRAY_SIZE(uart1_sdma_reqs),
 268         .main_clk       = "uart1_fck",
 269         .prcm           = {
 270                 .omap2 = {
 271                         .module_offs = CORE_MOD,
 272                         .prcm_reg_id = 1,
 273                         .module_bit = OMAP24XX_EN_UART1_SHIFT,
 274                         .idlest_reg_id = 1,
 275                         .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
 276                 },
 277         },
 278         .slaves         = omap2430_uart1_slaves,
 279         .slaves_cnt     = ARRAY_SIZE(omap2430_uart1_slaves),
 280         .class          = &uart_class,
 281         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 282 };
 283
 284 /* UART2 */
 285
 286 static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
 287         { .irq = INT_24XX_UART2_IRQ, },
 288 };
 289
 290 static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
 291         { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
 292         { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
 293 };
 294
 295 static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
 296         &omap2_l4_core__uart2,
 297 };
 298
 299 static struct omap_hwmod omap2430_uart2_hwmod = {
 300         .name           = "uart2",
 301         .mpu_irqs       = uart2_mpu_irqs,
 302         .mpu_irqs_cnt   = ARRAY_SIZE(uart2_mpu_irqs),
 303         .sdma_reqs      = uart2_sdma_reqs,
 304         .sdma_reqs_cnt  = ARRAY_SIZE(uart2_sdma_reqs),
 305         .main_clk       = "uart2_fck",
 306         .prcm           = {
 307                 .omap2 = {
 308                         .module_offs = CORE_MOD,
 309                         .prcm_reg_id = 1,
 310                         .module_bit = OMAP24XX_EN_UART2_SHIFT,
 311                         .idlest_reg_id = 1,
 312                         .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
 313                 },
 314         },
 315         .slaves         = omap2430_uart2_slaves,
 316         .slaves_cnt     = ARRAY_SIZE(omap2430_uart2_slaves),
 317         .class          = &uart_class,
 318         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 319 };
 320
 321 /* UART3 */
 322
 323 static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
 324         { .irq = INT_24XX_UART3_IRQ, },
 325 };
 326
 327 static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
 328         { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
 329         { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
 330 };
 331
 332 static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
 333         &omap2_l4_core__uart3,
 334 };
 335
 336 static struct omap_hwmod omap2430_uart3_hwmod = {
 337         .name           = "uart3",
 338         .mpu_irqs       = uart3_mpu_irqs,
 339         .mpu_irqs_cnt   = ARRAY_SIZE(uart3_mpu_irqs),
 340         .sdma_reqs      = uart3_sdma_reqs,
 341         .sdma_reqs_cnt  = ARRAY_SIZE(uart3_sdma_reqs),
 342         .main_clk       = "uart3_fck",
 343         .prcm           = {
 344                 .omap2 = {
 345                         .module_offs = CORE_MOD,
 346                         .prcm_reg_id = 2,
 347                         .module_bit = OMAP24XX_EN_UART3_SHIFT,
 348                         .idlest_reg_id = 2,
 349                         .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
 350                 },
 351         },
 352         .slaves         = omap2430_uart3_slaves,
 353         .slaves_cnt     = ARRAY_SIZE(omap2430_uart3_slaves),
 354         .class          = &uart_class,
 355         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 356 };
 357
 358 static __initdata struct omap_hwmod *omap2430_hwmods[] = {
 359         &omap2430_l3_main_hwmod,
 360         &omap2430_l4_core_hwmod,
 361         &omap2430_l4_wkup_hwmod,
 362         &omap2430_mpu_hwmod,
 363         &omap2430_iva_hwmod,
 364         &omap2430_uart1_hwmod,
 365         &omap2430_uart2_hwmod,
 366         &omap2430_uart3_hwmod,
 367         NULL,
 368 };
 369
 370 int __init omap2430_hwmod_init(void)
 371 {
 372         return omap_hwmod_init(omap2430_hwmods);
 373 }
 374
 375