arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c

   1 /*
   2  * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
   3  *
   4  * Copyright (C) 2009-2011 Nokia Corporation
   5  * Paul Walmsley
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * XXX handle crossbar/shared link difference for L3?
  12  * XXX these should be marked initdata for multi-OMAP kernels
  13  */
  14 #include <asm/sizes.h>
  15
  16 #include <plat/serial.h>
  17
  18 #include "omap_hwmod.h"
  19
  20 #include "omap_hwmod_common_data.h"
  21
  22 struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
  23         {
  24                 .pa_start       = 0x4809c000,
  25                 .pa_end         = 0x4809c1ff,
  26                 .flags          = ADDR_TYPE_RT,
  27         },
  28         { }
  29 };
  30
  31 struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
  32         {
  33                 .pa_start       = 0x480b4000,
  34                 .pa_end         = 0x480b41ff,
  35                 .flags          = ADDR_TYPE_RT,
  36         },
  37         { }
  38 };
  39
  40 struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = {
  41         {
  42                 .pa_start       = 0x48070000,
  43                 .pa_end         = 0x48070000 + SZ_128 - 1,
  44                 .flags          = ADDR_TYPE_RT,
  45         },
  46         { }
  47 };
  48
  49 struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = {
  50         {
  51                 .pa_start       = 0x48072000,
  52                 .pa_end         = 0x48072000 + SZ_128 - 1,
  53                 .flags          = ADDR_TYPE_RT,
  54         },
  55         { }
  56 };
  57
  58 struct omap_hwmod_addr_space omap2_dss_addrs[] = {
  59         {
  60                 .pa_start       = 0x48050000,
  61                 .pa_end         = 0x48050000 + SZ_1K - 1,
  62                 .flags          = ADDR_TYPE_RT
  63         },
  64         { }
  65 };
  66
  67 struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = {
  68         {
  69                 .pa_start       = 0x48050400,
  70                 .pa_end         = 0x48050400 + SZ_1K - 1,
  71                 .flags          = ADDR_TYPE_RT
  72         },
  73         { }
  74 };
  75
  76 struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = {
  77         {
  78                 .pa_start       = 0x48050800,
  79                 .pa_end         = 0x48050800 + SZ_1K - 1,
  80                 .flags          = ADDR_TYPE_RT
  81         },
  82         { }
  83 };
  84
  85 struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = {
  86         {
  87                 .pa_start       = 0x48050C00,
  88                 .pa_end         = 0x48050C00 + SZ_1K - 1,
  89                 .flags          = ADDR_TYPE_RT
  90         },
  91         { }
  92 };
  93
  94 struct omap_hwmod_addr_space omap2_timer10_addrs[] = {
  95         {
  96                 .pa_start       = 0x48086000,
  97                 .pa_end         = 0x48086000 + SZ_1K - 1,
  98                 .flags          = ADDR_TYPE_RT
  99         },
 100         { }
 101 };
 102
 103 struct omap_hwmod_addr_space omap2_timer11_addrs[] = {
 104         {
 105                 .pa_start       = 0x48088000,
 106                 .pa_end         = 0x48088000 + SZ_1K - 1,
 107                 .flags          = ADDR_TYPE_RT
 108         },
 109         { }
 110 };
 111
 112 struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = {
 113         {
 114                 .pa_start       = 0x4808a000,
 115                 .pa_end         = 0x4808a000 + SZ_1K - 1,
 116                 .flags          = ADDR_TYPE_RT
 117         },
 118         { }
 119 };
 120
 121 struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = {
 122         {
 123                 .pa_start       = 0x48098000,
 124                 .pa_end         = 0x48098000 + SZ_256 - 1,
 125                 .flags          = ADDR_TYPE_RT,
 126         },
 127         { }
 128 };
 129
 130 struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = {
 131         {
 132                 .pa_start       = 0x4809a000,
 133                 .pa_end         = 0x4809a000 + SZ_256 - 1,
 134                 .flags          = ADDR_TYPE_RT,
 135         },
 136         { }
 137 };
 138
 139 struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
 140         {
 141                 .pa_start       = 0x480b8000,
 142                 .pa_end         = 0x480b8000 + SZ_256 - 1,
 143                 .flags          = ADDR_TYPE_RT,
 144         },
 145         { }
 146 };
 147
 148 struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
 149         {
 150                 .pa_start       = 0x48056000,
 151                 .pa_end         = 0x48056000 + SZ_4K - 1,
 152                 .flags          = ADDR_TYPE_RT
 153         },
 154         { }
 155 };
 156
 157 struct omap_hwmod_addr_space omap2_mailbox_addrs[] = {
 158         {
 159                 .pa_start       = 0x48094000,
 160                 .pa_end         = 0x48094000 + SZ_512 - 1,
 161                 .flags          = ADDR_TYPE_RT,
 162         },
 163         { }
 164 };
 165
 166 struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
 167         {
 168                 .name           = "mpu",
 169                 .pa_start       = 0x48074000,
 170                 .pa_end         = 0x480740ff,
 171                 .flags          = ADDR_TYPE_RT
 172         },
 173         { }
 174 };
 175
 176 struct omap_hwmod_addr_space omap2_hdq1w_addr_space[] = {
 177         {
 178                 .pa_start       = 0x480b2000,
 179                 .pa_end         = 0x480b2fff,
 180                 .flags          = ADDR_TYPE_RT,
 181         },
 182         { }
 183 };