arch/arm/mach-orion/rd88f5182-setup.c

   1 /*
   2  * arch/arm/mach-orion/rd88f5182-setup.c
   3  *
   4  * Marvell Orion-NAS Reference Design Setup
   5  *
   6  * Maintainer: Ronen Shitrit <rshitrit@marvell.com>
   7  *
   8  * This file is licensed under  the terms of the GNU General Public
   9  * License version 2. This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/pci.h>
  17 #include <linux/irq.h>
  18 #include <linux/mtd/physmap.h>
  19 #include <linux/mv643xx_eth.h>
  20 #include <linux/ata_platform.h>
  21 #include <linux/i2c.h>
  22 #include <asm/mach-types.h>
  23 #include <asm/gpio.h>
  24 #include <asm/leds.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/pci.h>
  27 #include <asm/arch/orion.h>
  28 #include <asm/arch/platform.h>
  29 #include "common.h"
  30
  31 /*****************************************************************************
  32  * RD-88F5182 Info
  33  ****************************************************************************/
  34
  35 /*
  36  * 512K NOR flash Device bus boot chip select
  37  */
  38
  39 #define RD88F5182_NOR_BOOT_BASE         0xf4000000
  40 #define RD88F5182_NOR_BOOT_SIZE         SZ_512K
  41
  42 /*
  43  * 16M NOR flash on Device bus chip select 1
  44  */
  45
  46 #define RD88F5182_NOR_BASE              0xfc000000
  47 #define RD88F5182_NOR_SIZE              SZ_16M
  48
  49 /*
  50  * PCI
  51  */
  52
  53 #define RD88F5182_PCI_SLOT0_OFFS        7
  54 #define RD88F5182_PCI_SLOT0_IRQ_A_PIN   7
  55 #define RD88F5182_PCI_SLOT0_IRQ_B_PIN   6
  56
  57 /*
  58  * GPIO Debug LED
  59  */
  60
  61 #define RD88F5182_GPIO_DBG_LED          0
  62
  63 /*****************************************************************************
  64  * 16M NOR Flash on Device bus CS1
  65  ****************************************************************************/
  66
  67 static struct physmap_flash_data rd88f5182_nor_flash_data = {
  68         .width          = 1,
  69 };
  70
  71 static struct resource rd88f5182_nor_flash_resource = {
  72         .flags                  = IORESOURCE_MEM,
  73         .start                  = RD88F5182_NOR_BASE,
  74         .end                    = RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1,
  75 };
  76
  77 static struct platform_device rd88f5182_nor_flash = {
  78         .name                   = "physmap-flash",
  79         .id                     = 0,
  80         .dev            = {
  81                 .platform_data  = &rd88f5182_nor_flash_data,
  82         },
  83         .num_resources          = 1,
  84         .resource               = &rd88f5182_nor_flash_resource,
  85 };
  86
  87 #ifdef CONFIG_LEDS
  88
  89 /*****************************************************************************
  90  * Use GPIO debug led as CPU active indication
  91  ****************************************************************************/
  92
  93 static void rd88f5182_dbgled_event(led_event_t evt)
  94 {
  95         int val;
  96
  97         if (evt == led_idle_end)
  98                 val = 1;
  99         else if (evt == led_idle_start)
 100                 val = 0;
 101         else
 102                 return;
 103
 104         gpio_set_value(RD88F5182_GPIO_DBG_LED, val);
 105 }
 106
 107 static int __init rd88f5182_dbgled_init(void)
 108 {
 109         int pin;
 110
 111         if (machine_is_rd88f5182()) {
 112                 pin = RD88F5182_GPIO_DBG_LED;
 113
 114                 if (gpio_request(pin, "DBGLED") == 0) {
 115                         if (gpio_direction_output(pin, 0) != 0) {
 116                                 printk(KERN_ERR "rd88f5182_dbgled_init failed "
 117                                                 "to set output pin %d\n", pin);
 118                                 gpio_free(pin);
 119                                 return 0;
 120                         }
 121                 } else {
 122                         printk(KERN_ERR "rd88f5182_dbgled_init failed "
 123                                         "to request gpio %d\n", pin);
 124                         return 0;
 125                 }
 126
 127                 leds_event = rd88f5182_dbgled_event;
 128         }
 129         return 0;
 130 }
 131
 132 __initcall(rd88f5182_dbgled_init);
 133
 134 #endif
 135
 136 /*****************************************************************************
 137  * PCI
 138  ****************************************************************************/
 139
 140 void __init rd88f5182_pci_preinit(void)
 141 {
 142         int pin;
 143
 144         /*
 145          * Configure PCI GPIO IRQ pins
 146          */
 147         pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
 148         if (gpio_request(pin, "PCI IntA") == 0) {
 149                 if (gpio_direction_input(pin) == 0) {
 150                         set_irq_type(gpio_to_irq(pin), IRQT_LOW);
 151                 } else {
 152                         printk(KERN_ERR "rd88f5182_pci_preinit faield to "
 153                                         "set_irq_type pin %d\n", pin);
 154                         gpio_free(pin);
 155                 }
 156         } else {
 157                 printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin);
 158         }
 159
 160         pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
 161         if (gpio_request(pin, "PCI IntB") == 0) {
 162                 if (gpio_direction_input(pin) == 0) {
 163                         set_irq_type(gpio_to_irq(pin), IRQT_LOW);
 164                 } else {
 165                         printk(KERN_ERR "rd88f5182_pci_preinit faield to "
 166                                         "set_irq_type pin %d\n", pin);
 167                         gpio_free(pin);
 168                 }
 169         } else {
 170                 printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin);
 171         }
 172 }
 173
 174 static int __init rd88f5182_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 175 {
 176         /*
 177          * PCI-E isn't used on the RD2
 178          */
 179         if (dev->bus->number == orion_pcie_local_bus_nr())
 180                 return IRQ_ORION_PCIE0_INT;
 181
 182         /*
 183          * PCI IRQs are connected via GPIOs
 184          */
 185         switch (slot - RD88F5182_PCI_SLOT0_OFFS) {
 186         case 0:
 187                 if (pin == 1)
 188                         return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN);
 189                 else
 190                         return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN);
 191         default:
 192                 return -1;
 193         }
 194 }
 195
 196 static struct hw_pci rd88f5182_pci __initdata = {
 197         .nr_controllers = 2,
 198         .preinit        = rd88f5182_pci_preinit,
 199         .swizzle        = pci_std_swizzle,
 200         .setup          = orion_pci_sys_setup,
 201         .scan           = orion_pci_sys_scan_bus,
 202         .map_irq        = rd88f5182_pci_map_irq,
 203 };
 204
 205 static int __init rd88f5182_pci_init(void)
 206 {
 207         if (machine_is_rd88f5182())
 208                 pci_common_init(&rd88f5182_pci);
 209
 210         return 0;
 211 }
 212
 213 subsys_initcall(rd88f5182_pci_init);
 214
 215 /*****************************************************************************
 216  * Ethernet
 217  ****************************************************************************/
 218
 219 static struct mv643xx_eth_platform_data rd88f5182_eth_data = {
 220         .phy_addr       = 8,
 221         .force_phy_addr = 1,
 222 };
 223
 224 /*****************************************************************************
 225  * RTC DS1338 on I2C bus
 226  ****************************************************************************/
 227 static struct i2c_board_info __initdata rd88f5182_i2c_rtc = {
 228         .driver_name    = "rtc-ds1307",
 229         .type           = "ds1338",
 230         .addr           = 0x68,
 231 };
 232
 233 /*****************************************************************************
 234  * Sata
 235  ****************************************************************************/
 236 static struct mv_sata_platform_data rd88f5182_sata_data = {
 237         .n_ports        = 2,
 238 };
 239
 240 /*****************************************************************************
 241  * General Setup
 242  ****************************************************************************/
 243
 244 static struct platform_device *rd88f5182_devices[] __initdata = {
 245         &rd88f5182_nor_flash,
 246 };
 247
 248 static void __init rd88f5182_init(void)
 249 {
 250         /*
 251          * Setup basic Orion functions. Need to be called early.
 252          */
 253         orion_init();
 254
 255         /*
 256          * Setup the CPU address decode windows for our devices
 257          */
 258         orion_setup_cpu_win(ORION_DEV_BOOT, RD88F5182_NOR_BOOT_BASE,
 259                                 RD88F5182_NOR_BOOT_SIZE, -1);
 260         orion_setup_cpu_win(ORION_DEV1, RD88F5182_NOR_BASE,
 261                                 RD88F5182_NOR_SIZE, -1);
 262
 263         /*
 264          * Open a special address decode windows for the PCIE WA.
 265          */
 266         orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
 267         orion_write(ORION_REGS_BASE | 0x20070, (0x7941 |
 268                 (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
 269
 270         /*
 271          * Setup Multiplexing Pins --
 272          * MPP[0] Debug Led (GPIO - Out)
 273          * MPP[1] Debug Led (GPIO - Out)
 274          * MPP[2] N/A
 275          * MPP[3] RTC_Int (GPIO - In)
 276          * MPP[4] GPIO
 277          * MPP[5] GPIO
 278          * MPP[6] PCI_intA (GPIO - In)
 279          * MPP[7] PCI_intB (GPIO - In)
 280          * MPP[8-11] N/A
 281          * MPP[12] SATA 0 presence Indication
 282          * MPP[13] SATA 1 presence Indication
 283          * MPP[14] SATA 0 active Indication
 284          * MPP[15] SATA 1 active indication
 285          * MPP[16-19] Not used
 286          * MPP[20] PCI Clock to MV88F5182
 287          * MPP[21] PCI Clock to mini PCI CON11
 288          * MPP[22] USB 0 over current indication
 289          * MPP[23] USB 1 over current indication
 290          * MPP[24] USB 1 over current enable
 291          * MPP[25] USB 0 over current enable
 292          */
 293
 294         orion_write(MPP_0_7_CTRL, 0x00000003);
 295         orion_write(MPP_8_15_CTRL, 0x55550000);
 296         orion_write(MPP_16_19_CTRL, 0x5555);
 297
 298         orion_gpio_set_valid_pins(0x000000fb);
 299
 300         platform_add_devices(rd88f5182_devices, ARRAY_SIZE(rd88f5182_devices));
 301         i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1);
 302         orion_eth_init(&rd88f5182_eth_data);
 303         orion_sata_init(&rd88f5182_sata_data);
 304 }
 305
 306 MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
 307         /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
 308         .phys_io        = ORION_REGS_BASE,
 309         .io_pg_offst    = ((ORION_REGS_BASE) >> 18) & 0xFFFC,
 310         .boot_params    = 0x00000100,
 311         .init_machine   = rd88f5182_init,
 312         .map_io         = orion_map_io,
 313         .init_irq       = orion_init_irq,
 314         .timer          = &orion_timer,
 315 MACHINE_END