2 * reset controller for CSR SiRFprimaII
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 #include <linux/kernel.h>
10 #include <linux/mutex.h>
12 #include <linux/delay.h>
13 #include <linux/device.h>
15 #include <linux/of_address.h>
16 #include <linux/reboot.h>
18 void __iomem *sirfsoc_rstc_base;
19 static DEFINE_MUTEX(rstc_lock);
21 static struct of_device_id rstc_ids[] = {
22 { .compatible = "sirf,prima2-rstc" },
23 { .compatible = "sirf,marco-rstc" },
27 static int __init sirfsoc_of_rstc_init(void)
29 struct device_node *np;
31 np = of_find_matching_node(NULL, rstc_ids);
33 pr_err("unable to find compatible sirf rstc node in dtb\n");
37 sirfsoc_rstc_base = of_iomap(np, 0);
38 if (!sirfsoc_rstc_base)
39 panic("unable to map rstc cpu registers\n");
45 early_initcall(sirfsoc_of_rstc_init);
47 int sirfsoc_reset_device(struct device *dev)
51 if (of_property_read_u32(dev->of_node, "reset-bit", &reset_bit))
54 mutex_lock(&rstc_lock);
56 if (of_device_is_compatible(dev->of_node, "sirf,prima2-rstc")) {
58 * Writing 1 to this bit resets corresponding block. Writing 0 to this
59 * bit de-asserts reset signal of the corresponding block.
60 * datasheet doesn't require explicit delay between the set and clear
61 * of reset bit. it could be shorter if tests pass.
63 writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | reset_bit,
64 sirfsoc_rstc_base + (reset_bit / 32) * 4);
66 writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~reset_bit,
67 sirfsoc_rstc_base + (reset_bit / 32) * 4);
71 * Writing 1 to SET register resets corresponding block. Writing 1 to CLEAR
72 * register de-asserts reset signal of the corresponding block.
73 * datasheet doesn't require explicit delay between the set and clear
74 * of reset bit. it could be shorter if tests pass.
76 writel(reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8);
78 writel(reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);
81 mutex_unlock(&rstc_lock);
86 #define SIRFSOC_SYS_RST_BIT BIT(31)
88 void sirfsoc_restart(enum reboot_mode mode, const char *cmd)
90 writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);