2 * linux/arch/arm/mach-pxa/generic.c
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
8 * Code common to all PXA machines.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/ioport.h>
25 #include <linux/string.h>
26 #include <linux/sysdev.h>
28 #include <asm/hardware.h>
30 #include <asm/system.h>
31 #include <asm/pgtable.h>
32 #include <asm/mach/map.h>
34 #include <asm/arch/pxa-regs.h>
35 #include <asm/arch/gpio.h>
40 * Get the clock frequency as reflected by CCCR and the turbo flag.
41 * We assume these values have been applied via a fcs.
42 * If info is not 0 we also display the current settings.
44 unsigned int get_clk_frequency_khz(int info)
46 if (cpu_is_pxa21x() || cpu_is_pxa25x())
47 return pxa25x_get_clk_frequency_khz(info);
48 else if (cpu_is_pxa27x())
49 return pxa27x_get_clk_frequency_khz(info);
51 return pxa3xx_get_clk_frequency_khz(info);
53 EXPORT_SYMBOL(get_clk_frequency_khz);
56 * Return the current memory clock frequency in units of 10kHz
58 unsigned int get_memclk_frequency_10khz(void)
60 if (cpu_is_pxa21x() || cpu_is_pxa25x())
61 return pxa25x_get_memclk_frequency_10khz();
62 else if (cpu_is_pxa27x())
63 return pxa27x_get_memclk_frequency_10khz();
65 return pxa3xx_get_memclk_frequency_10khz();
67 EXPORT_SYMBOL(get_memclk_frequency_10khz);
70 * Handy function to set GPIO alternate functions
74 int pxa_gpio_mode(int gpio_mode)
77 int gpio = gpio_mode & GPIO_MD_MASK_NR;
78 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
81 if (gpio > pxa_last_gpio)
84 local_irq_save(flags);
85 if (gpio_mode & GPIO_DFLT_LOW)
86 GPCR(gpio) = GPIO_bit(gpio);
87 else if (gpio_mode & GPIO_DFLT_HIGH)
88 GPSR(gpio) = GPIO_bit(gpio);
89 if (gpio_mode & GPIO_MD_MASK_DIR)
90 GPDR(gpio) |= GPIO_bit(gpio);
92 GPDR(gpio) &= ~GPIO_bit(gpio);
93 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
94 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
95 local_irq_restore(flags);
100 EXPORT_SYMBOL(pxa_gpio_mode);
102 int gpio_direction_input(unsigned gpio)
107 if (gpio > pxa_last_gpio)
110 mask = GPIO_bit(gpio);
111 local_irq_save(flags);
113 local_irq_restore(flags);
117 EXPORT_SYMBOL(gpio_direction_input);
119 int gpio_direction_output(unsigned gpio, int value)
124 if (gpio > pxa_last_gpio)
127 mask = GPIO_bit(gpio);
128 local_irq_save(flags);
134 local_irq_restore(flags);
138 EXPORT_SYMBOL(gpio_direction_output);
143 int pxa_gpio_get_value(unsigned gpio)
145 return __gpio_get_value(gpio);
148 EXPORT_SYMBOL(pxa_gpio_get_value);
151 * Set output GPIO level
153 void pxa_gpio_set_value(unsigned gpio, int value)
155 __gpio_set_value(gpio, value);
158 EXPORT_SYMBOL(pxa_gpio_set_value);
161 * Routine to safely enable or disable a clock in the CKEN
163 void __pxa_set_cken(int clock, int enable)
166 local_irq_save(flags);
169 CKEN |= (1 << clock);
171 CKEN &= ~(1 << clock);
173 local_irq_restore(flags);
176 EXPORT_SYMBOL(__pxa_set_cken);
179 * Intel PXA2xx internal register mapping.
181 * Note 1: not all PXA2xx variants implement all those addresses.
183 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
184 * and cache flush area.
186 static struct map_desc standard_io_desc[] __initdata = {
188 .virtual = 0xf2000000,
189 .pfn = __phys_to_pfn(0x40000000),
190 .length = 0x02000000,
193 .virtual = 0xf4000000,
194 .pfn = __phys_to_pfn(0x44000000),
195 .length = 0x00100000,
198 .virtual = 0xf6000000,
199 .pfn = __phys_to_pfn(0x48000000),
200 .length = 0x00200000,
203 .virtual = 0xf8000000,
204 .pfn = __phys_to_pfn(0x4c000000),
205 .length = 0x00100000,
208 .virtual = 0xfa000000,
209 .pfn = __phys_to_pfn(0x50000000),
210 .length = 0x00100000,
213 .virtual = 0xfe000000,
214 .pfn = __phys_to_pfn(0x58000000),
215 .length = 0x00100000,
217 }, { /* UNCACHED_PHYS_0 */
218 .virtual = 0xff000000,
219 .pfn = __phys_to_pfn(0x00000000),
220 .length = 0x00100000,
225 void __init pxa_map_io(void)
227 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
228 get_clk_frequency_khz(1);
233 static unsigned long saved_gplr[4];
234 static unsigned long saved_gpdr[4];
235 static unsigned long saved_grer[4];
236 static unsigned long saved_gfer[4];
238 static int pxa_gpio_suspend(struct sys_device *dev, pm_message_t state)
242 for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) {
243 saved_gplr[i] = GPLR(gpio);
244 saved_gpdr[i] = GPDR(gpio);
245 saved_grer[i] = GRER(gpio);
246 saved_gfer[i] = GFER(gpio);
248 /* Clear GPIO transition detect bits */
249 GEDR(gpio) = GEDR(gpio);
254 static int pxa_gpio_resume(struct sys_device *dev)
258 for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) {
259 /* restore level with set/clear */
260 GPSR(gpio) = saved_gplr[i];
261 GPCR(gpio) = ~saved_gplr[i];
263 GRER(gpio) = saved_grer[i];
264 GFER(gpio) = saved_gfer[i];
265 GPDR(gpio) = saved_gpdr[i];
270 #define pxa_gpio_suspend NULL
271 #define pxa_gpio_resume NULL
274 struct sysdev_class pxa_gpio_sysclass = {
276 .suspend = pxa_gpio_suspend,
277 .resume = pxa_gpio_resume,
280 static int __init pxa_gpio_init(void)
282 return sysdev_class_register(&pxa_gpio_sysclass);
285 core_initcall(pxa_gpio_init);