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[ARM] pxa: add pxa3xx NAND support for littleton
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1 /*
2  *  linux/arch/arm/mach-pxa/littleton.c
3  *
4  *  Support for the Marvell Littleton Development Platform.
5  *
6  *  Author:     Jason Chagas (largely modified code)
7  *  Created:    Nov 20, 2006
8  *  Copyright:  (C) Copyright 2006 Marvell International Ltd.
9  *
10  *  2007-11-22  modified to align with latest kernel
11  *              eric miao <eric.miao@marvell.com>
12  *
13  *  This program is free software; you can redistribute it and/or modify
14  *  it under the terms of the GNU General Public License version 2 as
15  *  publishhed by the Free Software Foundation.
16  */
17
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/delay.h>
21 #include <linux/platform_device.h>
22 #include <linux/clk.h>
23
24 #include <asm/types.h>
25 #include <asm/setup.h>
26 #include <asm/memory.h>
27 #include <asm/mach-types.h>
28 #include <asm/hardware.h>
29 #include <asm/irq.h>
30
31 #include <asm/mach/arch.h>
32 #include <asm/mach/map.h>
33 #include <asm/mach/irq.h>
34
35 #include <asm/arch/pxa-regs.h>
36 #include <asm/arch/mfp-pxa300.h>
37 #include <asm/arch/gpio.h>
38 #include <asm/arch/pxafb.h>
39 #include <asm/arch/ssp.h>
40 #include <asm/arch/pxa27x_keypad.h>
41 #include <asm/arch/pxa3xx_nand.h>
42 #include <asm/arch/littleton.h>
43
44 #include "generic.h"
45
46 /* Littleton MFP configurations */
47 static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
48         /* LCD */
49         GPIO54_LCD_LDD_0,
50         GPIO55_LCD_LDD_1,
51         GPIO56_LCD_LDD_2,
52         GPIO57_LCD_LDD_3,
53         GPIO58_LCD_LDD_4,
54         GPIO59_LCD_LDD_5,
55         GPIO60_LCD_LDD_6,
56         GPIO61_LCD_LDD_7,
57         GPIO62_LCD_LDD_8,
58         GPIO63_LCD_LDD_9,
59         GPIO64_LCD_LDD_10,
60         GPIO65_LCD_LDD_11,
61         GPIO66_LCD_LDD_12,
62         GPIO67_LCD_LDD_13,
63         GPIO68_LCD_LDD_14,
64         GPIO69_LCD_LDD_15,
65         GPIO70_LCD_LDD_16,
66         GPIO71_LCD_LDD_17,
67         GPIO72_LCD_FCLK,
68         GPIO73_LCD_LCLK,
69         GPIO74_LCD_PCLK,
70         GPIO75_LCD_BIAS,
71
72         /* SSP2 */
73         GPIO25_SSP2_SCLK,
74         GPIO17_SSP2_FRM,
75         GPIO27_SSP2_TXD,
76
77         /* Debug Ethernet */
78         GPIO90_GPIO,
79
80         /* Keypad */
81         GPIO107_KP_DKIN_0,
82         GPIO108_KP_DKIN_1,
83         GPIO115_KP_MKIN_0,
84         GPIO116_KP_MKIN_1,
85         GPIO117_KP_MKIN_2,
86         GPIO118_KP_MKIN_3,
87         GPIO119_KP_MKIN_4,
88         GPIO120_KP_MKIN_5,
89         GPIO121_KP_MKOUT_0,
90         GPIO122_KP_MKOUT_1,
91         GPIO123_KP_MKOUT_2,
92         GPIO124_KP_MKOUT_3,
93         GPIO125_KP_MKOUT_4,
94 };
95
96 static struct resource smc91x_resources[] = {
97         [0] = {
98                 .start  = (LITTLETON_ETH_PHYS + 0x300),
99                 .end    = (LITTLETON_ETH_PHYS + 0xfffff),
100                 .flags  = IORESOURCE_MEM,
101         },
102         [1] = {
103                 .start  = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
104                 .end    = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
105                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
106         }
107 };
108
109 static struct platform_device smc91x_device = {
110         .name           = "smc91x",
111         .id             = 0,
112         .num_resources  = ARRAY_SIZE(smc91x_resources),
113         .resource       = smc91x_resources,
114 };
115
116 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
117 /* use bit 30, 31 as the indicator of command parameter number */
118 #define CMD0(x)         ((0x00000000) | ((x) << 9))
119 #define CMD1(x, x1)     ((0x40000000) | ((x) << 9) | 0x100 | (x1))
120 #define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\
121                          ((x1) << 9) | 0x100 | (x2))
122
123 static uint32_t lcd_panel_reset[] = {
124         CMD0(0x1), /* reset */
125         CMD0(0x0), /* nop */
126         CMD0(0x0), /* nop */
127         CMD0(0x0), /* nop */
128 };
129
130 static uint32_t lcd_panel_on[] = {
131         CMD0(0x29),             /* Display ON */
132         CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
133         CMD0(0x11),             /* Sleep out */
134         CMD1(0xB0, 0x16),       /* Wake */
135 };
136
137 static uint32_t lcd_panel_off[] = {
138         CMD0(0x28),             /* Display OFF */
139         CMD2(0xB8, 0x80, 0x02), /* Output Control */
140         CMD0(0x10),             /* Sleep in */
141         CMD1(0xB0, 0x00),       /* Deep stand by in */
142 };
143
144 static uint32_t lcd_vga_pass_through[] = {
145         CMD1(0xB0, 0x16),
146         CMD1(0xBC, 0x80),
147         CMD1(0xE1, 0x00),
148         CMD1(0x36, 0x50),
149         CMD1(0x3B, 0x00),
150 };
151
152 static uint32_t lcd_qvga_pass_through[] = {
153         CMD1(0xB0, 0x16),
154         CMD1(0xBC, 0x81),
155         CMD1(0xE1, 0x00),
156         CMD1(0x36, 0x50),
157         CMD1(0x3B, 0x22),
158 };
159
160 static uint32_t lcd_vga_transfer[] = {
161         CMD1(0xcf, 0x02),       /* Blanking period control (1) */
162         CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
163         CMD1(0xd1, 0x01),       /* CKV timing control on/off */
164         CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
165         CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
166         CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
167         CMD1(0xd5, 0x14),       /* ASW timing control (2) */
168         CMD0(0x21),             /* Invert for normally black display */
169         CMD0(0x29),             /* Display on */
170 };
171
172 static uint32_t lcd_qvga_transfer[] = {
173         CMD1(0xd6, 0x02),       /* Blanking period control (1) */
174         CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
175         CMD1(0xd8, 0x01),       /* CKV timing control on/off */
176         CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
177         CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
178         CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
179         CMD1(0xe0, 0x0a),       /* ASW timing control (2) */
180         CMD0(0x21),             /* Invert for normally black display */
181         CMD0(0x29),             /* Display on */
182 };
183
184 static uint32_t lcd_panel_config[] = {
185         CMD2(0xb8, 0xff, 0xf9), /* Output control */
186         CMD0(0x11),             /* sleep out */
187         CMD1(0xba, 0x01),       /* Display mode (1) */
188         CMD1(0xbb, 0x00),       /* Display mode (2) */
189         CMD1(0x3a, 0x60),       /* Display mode 18-bit RGB */
190         CMD1(0xbf, 0x10),       /* Drive system change control */
191         CMD1(0xb1, 0x56),       /* Booster operation setup */
192         CMD1(0xb2, 0x33),       /* Booster mode setup */
193         CMD1(0xb3, 0x11),       /* Booster frequency setup */
194         CMD1(0xb4, 0x02),       /* Op amp/system clock */
195         CMD1(0xb5, 0x35),       /* VCS voltage */
196         CMD1(0xb6, 0x40),       /* VCOM voltage */
197         CMD1(0xb7, 0x03),       /* External display signal */
198         CMD1(0xbd, 0x00),       /* ASW slew rate */
199         CMD1(0xbe, 0x00),       /* Dummy data for QuadData operation */
200         CMD1(0xc0, 0x11),       /* Sleep out FR count (A) */
201         CMD1(0xc1, 0x11),       /* Sleep out FR count (B) */
202         CMD1(0xc2, 0x11),       /* Sleep out FR count (C) */
203         CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
204         CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
205         CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
206         CMD1(0xc6, 0xc0),       /* Sleep out FR count (G) */
207         CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
208         CMD1(0xc8, 0x44),       /* Gamma 1 fine tuning (2) */
209         CMD1(0xc9, 0x33),       /* Gamma 1 inclination adjustment */
210         CMD1(0xca, 0x00),       /* Gamma 1 blue offset adjustment */
211         CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
212 };
213
214 static void ssp_reconfig(struct ssp_dev *dev, int nparam)
215 {
216         static int last_nparam = -1;
217
218         /* check if it is necessary to re-config SSP */
219         if (nparam == last_nparam)
220                 return;
221
222         ssp_disable(dev);
223         ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0);
224
225         last_nparam = nparam;
226 }
227
228 static void ssp_send_cmd(uint32_t *cmd, int num)
229 {
230         static int ssp_initialized;
231         static struct ssp_dev ssp2;
232
233         int i;
234
235         if (!ssp_initialized) {
236                 ssp_init(&ssp2, 2, SSP_NO_IRQ);
237                 ssp_initialized = 1;
238         }
239
240         clk_enable(ssp2.ssp->clk);
241         for (i = 0; i < num; i++, cmd++) {
242                 ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3);
243                 ssp_write_word(&ssp2, *cmd & 0x3fffffff);
244
245                 /* FIXME: ssp_flush() is mandatory here to work */
246                 ssp_flush(&ssp2);
247         }
248         clk_disable(ssp2.ssp->clk);
249 }
250
251 static void littleton_lcd_power(int on, struct fb_var_screeninfo *var)
252 {
253         if (on) {
254                 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on));
255                 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset));
256                 if (var->xres > 240) {
257                         /* VGA */
258                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through));
259                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
260                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer));
261                 } else {
262                         /* QVGA */
263                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through));
264                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
265                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer));
266                 }
267         } else
268                 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off));
269 }
270
271 static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = {
272         [0] = {
273                 /* VGA */
274                 .pixclock       = 38250,
275                 .xres           = 480,
276                 .yres           = 640,
277                 .bpp            = 16,
278                 .hsync_len      = 8,
279                 .left_margin    = 8,
280                 .right_margin   = 24,
281                 .vsync_len      = 2,
282                 .upper_margin   = 2,
283                 .lower_margin   = 4,
284                 .sync           = 0,
285         },
286         [1] = {
287                 /* QVGA */
288                 .pixclock       = 153000,
289                 .xres           = 240,
290                 .yres           = 320,
291                 .bpp            = 16,
292                 .hsync_len      = 8,
293                 .left_margin    = 8,
294                 .right_margin   = 88,
295                 .vsync_len      = 2,
296                 .upper_margin   = 2,
297                 .lower_margin   = 2,
298                 .sync           = 0,
299         },
300 };
301
302 static struct pxafb_mach_info littleton_lcd_info = {
303         .modes                  = tpo_tdo24mtea1_modes,
304         .num_modes              = 2,
305         .lcd_conn               = LCD_COLOR_TFT_16BPP,
306         .pxafb_lcd_power        = littleton_lcd_power,
307 };
308
309 static void littleton_init_lcd(void)
310 {
311         set_pxa_fb_info(&littleton_lcd_info);
312 }
313 #else
314 static inline void littleton_init_lcd(void) {};
315 #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
316
317 #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
318 static unsigned int littleton_matrix_key_map[] = {
319         /* KEY(row, col, key_code) */
320         KEY(1, 3, KEY_0), KEY(0, 0, KEY_1), KEY(1, 0, KEY_2), KEY(2, 0, KEY_3),
321         KEY(0, 1, KEY_4), KEY(1, 1, KEY_5), KEY(2, 1, KEY_6), KEY(0, 2, KEY_7),
322         KEY(1, 2, KEY_8), KEY(2, 2, KEY_9),
323
324         KEY(0, 3, KEY_KPASTERISK),      /* * */
325         KEY(2, 3, KEY_KPDOT),           /* # */
326
327         KEY(5, 4, KEY_ENTER),
328
329         KEY(5, 0, KEY_UP),
330         KEY(5, 1, KEY_DOWN),
331         KEY(5, 2, KEY_LEFT),
332         KEY(5, 3, KEY_RIGHT),
333         KEY(3, 2, KEY_HOME),
334         KEY(4, 1, KEY_END),
335         KEY(3, 3, KEY_BACK),
336
337         KEY(4, 0, KEY_SEND),
338         KEY(4, 2, KEY_VOLUMEUP),
339         KEY(4, 3, KEY_VOLUMEDOWN),
340
341         KEY(3, 0, KEY_F22),     /* soft1 */
342         KEY(3, 1, KEY_F23),     /* soft2 */
343 };
344
345 static struct pxa27x_keypad_platform_data littleton_keypad_info = {
346         .matrix_key_rows        = 6,
347         .matrix_key_cols        = 5,
348         .matrix_key_map         = littleton_matrix_key_map,
349         .matrix_key_map_size    = ARRAY_SIZE(littleton_matrix_key_map),
350
351         .enable_rotary0         = 1,
352         .rotary0_up_key         = KEY_UP,
353         .rotary0_down_key       = KEY_DOWN,
354
355         .debounce_interval      = 30,
356 };
357 static void __init littleton_init_keypad(void)
358 {
359         pxa_set_keypad_info(&littleton_keypad_info);
360 }
361 #else
362 static inline void littleton_init_keypad(void) {}
363 #endif
364
365 #if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
366 static struct mtd_partition littleton_nand_partitions[] = {
367         [0] = {
368                 .name        = "Bootloader",
369                 .offset      = 0,
370                 .size        = 0x060000,
371                 .mask_flags  = MTD_WRITEABLE, /* force read-only */
372         },
373         [1] = {
374                 .name        = "Kernel",
375                 .offset      = 0x060000,
376                 .size        = 0x200000,
377                 .mask_flags  = MTD_WRITEABLE, /* force read-only */
378         },
379         [2] = {
380                 .name        = "Filesystem",
381                 .offset      = 0x0260000,
382                 .size        = 0x3000000,     /* 48M - rootfs */
383         },
384         [3] = {
385                 .name        = "MassStorage",
386                 .offset      = 0x3260000,
387                 .size        = 0x3d40000,
388         },
389         [4] = {
390                 .name        = "BBT",
391                 .offset      = 0x6FA0000,
392                 .size        = 0x80000,
393                 .mask_flags  = MTD_WRITEABLE,  /* force read-only */
394         },
395         /* NOTE: we reserve some blocks at the end of the NAND flash for
396          * bad block management, and the max number of relocation blocks
397          * differs on different platforms. Please take care with it when
398          * defining the partition table.
399          */
400 };
401
402 static struct pxa3xx_nand_platform_data littleton_nand_info = {
403         .enable_arbiter = 1,
404         .parts          = littleton_nand_partitions,
405         .nr_parts       = ARRAY_SIZE(littleton_nand_partitions),
406 };
407
408 static void __init littleton_init_nand(void)
409 {
410         pxa3xx_set_nand_info(&littleton_nand_info);
411 }
412 #else
413 static inline void littleton_init_nand(void) {}
414 #endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
415
416 static void __init littleton_init(void)
417 {
418         /* initialize MFP configurations */
419         pxa3xx_mfp_config(ARRAY_AND_SIZE(littleton_mfp_cfg));
420
421         /*
422          * Note: we depend bootloader set the correct
423          * value to MSC register for SMC91x.
424          */
425         platform_device_register(&smc91x_device);
426
427         littleton_init_lcd();
428         littleton_init_keypad();
429         littleton_init_nand();
430 }
431
432 MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)")
433         .phys_io        = 0x40000000,
434         .boot_params    = 0xa0000100,
435         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
436         .map_io         = pxa_map_io,
437         .init_irq       = pxa3xx_init_irq,
438         .timer          = &pxa_timer,
439         .init_machine   = littleton_init,
440 MACHINE_END