2 * linux/arch/arm/mach-pxa/lpd270.c
4 * Support for the LogicPD PXA270 Card Engine.
5 * Derived from the mainstone code, which carries these notices:
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/pwm_backlight.h>
28 #include <asm/types.h>
29 #include <asm/setup.h>
30 #include <asm/memory.h>
31 #include <asm/mach-types.h>
32 #include <mach/hardware.h>
34 #include <asm/sizes.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/flash.h>
41 #include <mach/pxa27x.h>
42 #include <mach/gpio.h>
43 #include <mach/lpd270.h>
44 #include <mach/audio.h>
45 #include <mach/pxafb.h>
47 #include <mach/irda.h>
48 #include <mach/ohci.h>
49 #include <mach/smemc.h>
54 static unsigned long lpd270_pin_config[] __initdata = {
56 GPIO15_nCS_1, /* Mainboard Flash */
57 GPIO78_nCS_2, /* CPLD + Ethernet */
59 /* LCD - 16bpp Active TFT */
80 GPIO16_PWM0_OUT, /* Backlight */
88 GPIO29_AC97_SDATA_IN_0,
89 GPIO30_AC97_SDATA_OUT,
93 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
96 static unsigned int lpd270_irq_enabled;
98 static void lpd270_mask_irq(unsigned int irq)
100 int lpd270_irq = irq - LPD270_IRQ(0);
102 __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
104 lpd270_irq_enabled &= ~(1 << lpd270_irq);
105 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
108 static void lpd270_unmask_irq(unsigned int irq)
110 int lpd270_irq = irq - LPD270_IRQ(0);
112 lpd270_irq_enabled |= 1 << lpd270_irq;
113 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
116 static struct irq_chip lpd270_irq_chip = {
118 .ack = lpd270_mask_irq,
119 .mask = lpd270_mask_irq,
120 .unmask = lpd270_unmask_irq,
123 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
125 unsigned long pending;
127 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
129 desc->chip->ack(irq); /* clear useless edge notification */
130 if (likely(pending)) {
131 irq = LPD270_IRQ(0) + __ffs(pending);
132 generic_handle_irq(irq);
134 pending = __raw_readw(LPD270_INT_STATUS) &
140 static void __init lpd270_init_irq(void)
146 __raw_writew(0, LPD270_INT_MASK);
147 __raw_writew(0, LPD270_INT_STATUS);
149 /* setup extra LogicPD PXA270 irqs */
150 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
151 set_irq_chip(irq, &lpd270_irq_chip);
152 set_irq_handler(irq, handle_level_irq);
153 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
155 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
156 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
161 static int lpd270_irq_resume(struct sys_device *dev)
163 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
167 static struct sysdev_class lpd270_irq_sysclass = {
169 .resume = lpd270_irq_resume,
172 static struct sys_device lpd270_irq_device = {
173 .cls = &lpd270_irq_sysclass,
176 static int __init lpd270_irq_device_init(void)
179 if (machine_is_logicpd_pxa270()) {
180 ret = sysdev_class_register(&lpd270_irq_sysclass);
182 ret = sysdev_register(&lpd270_irq_device);
187 device_initcall(lpd270_irq_device_init);
191 static struct resource smc91x_resources[] = {
193 .start = LPD270_ETH_PHYS,
194 .end = (LPD270_ETH_PHYS + 0xfffff),
195 .flags = IORESOURCE_MEM,
198 .start = LPD270_ETHERNET_IRQ,
199 .end = LPD270_ETHERNET_IRQ,
200 .flags = IORESOURCE_IRQ,
204 static struct platform_device smc91x_device = {
207 .num_resources = ARRAY_SIZE(smc91x_resources),
208 .resource = smc91x_resources,
211 static struct resource lpd270_flash_resources[] = {
213 .start = PXA_CS0_PHYS,
214 .end = PXA_CS0_PHYS + SZ_64M - 1,
215 .flags = IORESOURCE_MEM,
218 .start = PXA_CS1_PHYS,
219 .end = PXA_CS1_PHYS + SZ_64M - 1,
220 .flags = IORESOURCE_MEM,
224 static struct mtd_partition lpd270_flash0_partitions[] = {
226 .name = "Bootloader",
229 .mask_flags = MTD_WRITEABLE /* force read-only */
233 .offset = 0x00040000,
235 .name = "Filesystem",
236 .size = MTDPART_SIZ_FULL,
241 static struct flash_platform_data lpd270_flash_data[2] = {
243 .name = "processor-flash",
244 .map_name = "cfi_probe",
245 .parts = lpd270_flash0_partitions,
246 .nr_parts = ARRAY_SIZE(lpd270_flash0_partitions),
248 .name = "mainboard-flash",
249 .map_name = "cfi_probe",
255 static struct platform_device lpd270_flash_device[2] = {
257 .name = "pxa2xx-flash",
260 .platform_data = &lpd270_flash_data[0],
262 .resource = &lpd270_flash_resources[0],
265 .name = "pxa2xx-flash",
268 .platform_data = &lpd270_flash_data[1],
270 .resource = &lpd270_flash_resources[1],
275 static struct platform_pwm_backlight_data lpd270_backlight_data = {
279 .pwm_period_ns = 78770,
282 static struct platform_device lpd270_backlight_device = {
283 .name = "pwm-backlight",
285 .parent = &pxa27x_device_pwm0.dev,
286 .platform_data = &lpd270_backlight_data,
290 /* 5.7" TFT QVGA (LoLo display number 1) */
291 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
298 .right_margin = 0x0a,
300 .upper_margin = 0x08,
301 .lower_margin = 0x14,
302 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
305 static struct pxafb_mach_info sharp_lq057q3dc02 = {
306 .modes = &sharp_lq057q3dc02_mode,
308 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
309 LCD_ALTERNATE_MAPPING,
312 /* 12.1" TFT SVGA (LoLo display number 2) */
313 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
320 .right_margin = 0x05,
322 .upper_margin = 0x14,
323 .lower_margin = 0x0a,
324 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
327 static struct pxafb_mach_info sharp_lq121s1dg31 = {
328 .modes = &sharp_lq121s1dg31_mode,
330 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
331 LCD_ALTERNATE_MAPPING,
334 /* 3.6" TFT QVGA (LoLo display number 3) */
335 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
342 .right_margin = 0x0a,
344 .upper_margin = 0x03,
345 .lower_margin = 0x03,
346 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
349 static struct pxafb_mach_info sharp_lq036q1da01 = {
350 .modes = &sharp_lq036q1da01_mode,
352 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
353 LCD_ALTERNATE_MAPPING,
356 /* 6.4" TFT VGA (LoLo display number 5) */
357 static struct pxafb_mode_info sharp_lq64d343_mode = {
364 .right_margin = 0x19,
366 .upper_margin = 0x22,
367 .lower_margin = 0x00,
368 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
371 static struct pxafb_mach_info sharp_lq64d343 = {
372 .modes = &sharp_lq64d343_mode,
374 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
375 LCD_ALTERNATE_MAPPING,
378 /* 10.4" TFT VGA (LoLo display number 7) */
379 static struct pxafb_mode_info sharp_lq10d368_mode = {
386 .right_margin = 0x19,
388 .upper_margin = 0x22,
389 .lower_margin = 0x00,
390 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
393 static struct pxafb_mach_info sharp_lq10d368 = {
394 .modes = &sharp_lq10d368_mode,
396 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
397 LCD_ALTERNATE_MAPPING,
400 /* 3.5" TFT QVGA (LoLo display number 8) */
401 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
408 .right_margin = 0x0a,
410 .upper_margin = 0x05,
411 .lower_margin = 0x14,
412 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
415 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
416 .modes = &sharp_lq035q7db02_20_mode,
418 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
419 LCD_ALTERNATE_MAPPING,
422 static struct pxafb_mach_info *lpd270_lcd_to_use;
424 static int __init lpd270_set_lcd(char *str)
426 if (!strnicmp(str, "lq057q3dc02", 11)) {
427 lpd270_lcd_to_use = &sharp_lq057q3dc02;
428 } else if (!strnicmp(str, "lq121s1dg31", 11)) {
429 lpd270_lcd_to_use = &sharp_lq121s1dg31;
430 } else if (!strnicmp(str, "lq036q1da01", 11)) {
431 lpd270_lcd_to_use = &sharp_lq036q1da01;
432 } else if (!strnicmp(str, "lq64d343", 8)) {
433 lpd270_lcd_to_use = &sharp_lq64d343;
434 } else if (!strnicmp(str, "lq10d368", 8)) {
435 lpd270_lcd_to_use = &sharp_lq10d368;
436 } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
437 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
439 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
445 __setup("lcd=", lpd270_set_lcd);
447 static struct platform_device *platform_devices[] __initdata = {
449 &lpd270_backlight_device,
450 &lpd270_flash_device[0],
451 &lpd270_flash_device[1],
454 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
455 .port_mode = PMM_PERPORT_MODE,
456 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
459 static void __init lpd270_init(void)
461 pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
463 pxa_set_ffuart_info(NULL);
464 pxa_set_btuart_info(NULL);
465 pxa_set_stuart_info(NULL);
467 lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
468 lpd270_flash_data[1].width = 4;
471 * System bus arbiter setting:
473 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
475 ARB_CNTRL = ARB_CORE_PARK | 0x234;
477 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
479 pxa_set_ac97_info(NULL);
481 if (lpd270_lcd_to_use != NULL)
482 set_pxa_fb_info(lpd270_lcd_to_use);
484 pxa_set_ohci_info(&lpd270_ohci_platform_data);
488 static struct map_desc lpd270_io_desc[] __initdata = {
490 .virtual = LPD270_CPLD_VIRT,
491 .pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
492 .length = LPD270_CPLD_SIZE,
497 static void __init lpd270_map_io(void)
500 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
502 /* for use I SRAM as framebuffer. */
507 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
508 /* Maintainer: Peter Barada */
509 .boot_params = 0xa0000100,
510 .map_io = lpd270_map_io,
511 .nr_irqs = LPD270_NR_IRQS,
512 .init_irq = lpd270_init_irq,
514 .init_machine = lpd270_init,