2 * linux/arch/arm/mach-realview/core.c
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/sysdev.h>
25 #include <linux/interrupt.h>
26 #include <linux/amba/bus.h>
27 #include <linux/amba/clcd.h>
29 #include <linux/smsc911x.h>
30 #include <linux/ata_platform.h>
31 #include <linux/amba/mmci.h>
32 #include <linux/gfp.h>
33 #include <linux/clkdev.h>
34 #include <linux/mtd/physmap.h>
36 #include <asm/system.h>
37 #include <mach/hardware.h>
40 #include <asm/mach-types.h>
41 #include <asm/hardware/arm_timer.h>
42 #include <asm/hardware/icst.h>
44 #include <asm/mach/arch.h>
45 #include <asm/mach/irq.h>
46 #include <asm/mach/map.h>
48 #include <asm/hardware/gic.h>
50 #include <mach/platform.h>
51 #include <mach/irqs.h>
52 #include <asm/hardware/timer-sp.h>
54 #include <plat/clcd.h>
55 #include <plat/sched_clock.h>
59 #ifdef CONFIG_ZONE_DMA
61 * Adjust the zones if there are restrictions for DMA access.
63 void __init realview_adjust_zones(unsigned long *size, unsigned long *hole)
65 unsigned long dma_size = SZ_256M >> PAGE_SHIFT;
67 if (!machine_is_realview_pbx() || size[0] <= dma_size)
70 size[ZONE_NORMAL] = size[0] - dma_size;
71 size[ZONE_DMA] = dma_size;
72 hole[ZONE_NORMAL] = hole[0];
78 #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
80 static void realview_flash_set_vpp(struct map_info *map, int on)
84 val = __raw_readl(REALVIEW_FLASHCTRL);
86 val |= REALVIEW_FLASHPROG_FLVPPEN;
88 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
89 __raw_writel(val, REALVIEW_FLASHCTRL);
92 static struct physmap_flash_data realview_flash_data = {
94 .set_vpp = realview_flash_set_vpp,
97 struct platform_device realview_flash_device = {
98 .name = "physmap-flash",
101 .platform_data = &realview_flash_data,
105 int realview_flash_register(struct resource *res, u32 num)
107 realview_flash_device.resource = res;
108 realview_flash_device.num_resources = num;
109 return platform_device_register(&realview_flash_device);
112 static struct smsc911x_platform_config smsc911x_config = {
113 .flags = SMSC911X_USE_32BIT,
114 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
115 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
116 .phy_interface = PHY_INTERFACE_MODE_MII,
119 static struct platform_device realview_eth_device = {
125 int realview_eth_register(const char *name, struct resource *res)
128 realview_eth_device.name = name;
129 realview_eth_device.resource = res;
130 if (strcmp(realview_eth_device.name, "smsc911x") == 0)
131 realview_eth_device.dev.platform_data = &smsc911x_config;
133 return platform_device_register(&realview_eth_device);
136 struct platform_device realview_usb_device = {
141 int realview_usb_register(struct resource *res)
143 realview_usb_device.resource = res;
144 return platform_device_register(&realview_usb_device);
147 static struct pata_platform_info pata_platform_data = {
151 static struct resource pata_resources[] = {
153 .start = REALVIEW_CF_BASE,
154 .end = REALVIEW_CF_BASE + 0xff,
155 .flags = IORESOURCE_MEM,
158 .start = REALVIEW_CF_BASE + 0x100,
159 .end = REALVIEW_CF_BASE + SZ_4K - 1,
160 .flags = IORESOURCE_MEM,
164 struct platform_device realview_cf_device = {
165 .name = "pata_platform",
167 .num_resources = ARRAY_SIZE(pata_resources),
168 .resource = pata_resources,
170 .platform_data = &pata_platform_data,
174 static struct resource realview_i2c_resource = {
175 .start = REALVIEW_I2C_BASE,
176 .end = REALVIEW_I2C_BASE + SZ_4K - 1,
177 .flags = IORESOURCE_MEM,
180 struct platform_device realview_i2c_device = {
181 .name = "versatile-i2c",
184 .resource = &realview_i2c_resource,
187 static struct i2c_board_info realview_i2c_board_info[] = {
189 I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
193 static int __init realview_i2c_init(void)
195 return i2c_register_board_info(0, realview_i2c_board_info,
196 ARRAY_SIZE(realview_i2c_board_info));
198 arch_initcall(realview_i2c_init);
200 #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
203 * This is only used if GPIOLIB support is disabled
205 static unsigned int realview_mmc_status(struct device *dev)
207 struct amba_device *adev = container_of(dev, struct amba_device, dev);
210 if (machine_is_realview_pb1176()) {
211 static bool inserted = false;
214 * The PB1176 does not have the status register,
215 * assume it is inserted at startup, then invert
216 * for each call so card insertion/removal will
217 * be detected anyway. This will not be called if
218 * GPIO on PL061 is active, which is the proper
219 * way to do this on the PB1176.
221 inserted = !inserted;
222 return inserted ? 0 : 1;
225 if (adev->res.start == REALVIEW_MMCI0_BASE)
230 return readl(REALVIEW_SYSMCI) & mask;
233 struct mmci_platform_data realview_mmc0_plat_data = {
234 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
235 .status = realview_mmc_status,
241 struct mmci_platform_data realview_mmc1_plat_data = {
242 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
243 .status = realview_mmc_status,
252 static const struct icst_params realview_oscvco_params = {
254 .vco_max = ICST307_VCO_MAX,
255 .vco_min = ICST307_VCO_MIN,
260 .s2div = icst307_s2div,
261 .idx2s = icst307_idx2s,
264 static void realview_oscvco_set(struct clk *clk, struct icst_vco vco)
266 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
269 val = readl(clk->vcoreg) & ~0x7ffff;
270 val |= vco.v | (vco.r << 9) | (vco.s << 16);
272 writel(0xa05f, sys_lock);
273 writel(val, clk->vcoreg);
277 static const struct clk_ops oscvco_clk_ops = {
278 .round = icst_clk_round,
280 .setvco = realview_oscvco_set,
283 static struct clk oscvco_clk = {
284 .ops = &oscvco_clk_ops,
285 .params = &realview_oscvco_params,
289 * These are fixed clocks.
291 static struct clk ref24_clk = {
295 static struct clk dummy_apb_pclk;
297 static struct clk_lookup lookups[] = {
299 .con_id = "apb_pclk",
300 .clk = &dummy_apb_pclk,
302 .dev_id = "dev:uart0",
305 .dev_id = "dev:uart1",
308 .dev_id = "dev:uart2",
311 .dev_id = "fpga:uart3",
313 }, { /* UART3 is on the dev chip in PB1176 */
314 .dev_id = "dev:uart3",
316 }, { /* UART4 only exists in PB1176 */
317 .dev_id = "fpga:uart4",
320 .dev_id = "fpga:kmi0",
323 .dev_id = "fpga:kmi1",
326 .dev_id = "fpga:mmc0",
328 }, { /* CLCD is in the PB1176 and EB DevChip */
329 .dev_id = "dev:clcd",
332 .dev_id = "issp:clcd",
335 .dev_id = "dev:ssp0",
340 void __init realview_init_early(void)
342 void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
344 if (machine_is_realview_pb1176())
345 oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC0_OFFSET;
347 oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC4_OFFSET;
349 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
351 versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
357 #define SYS_CLCD_NLCDIOON (1 << 2)
358 #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
359 #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
360 #define SYS_CLCD_ID_MASK (0x1f << 8)
361 #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
362 #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
363 #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
364 #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
365 #define SYS_CLCD_ID_VGA (0x1f << 8)
368 * Disable all display connectors on the interface module.
370 static void realview_clcd_disable(struct clcd_fb *fb)
372 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
375 val = readl(sys_clcd);
376 val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
377 writel(val, sys_clcd);
381 * Enable the relevant connector on the interface module.
383 static void realview_clcd_enable(struct clcd_fb *fb)
385 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
391 val = readl(sys_clcd);
392 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
393 writel(val, sys_clcd);
397 * Detect which LCD panel is connected, and return the appropriate
398 * clcd_panel structure. Note: we do not have any information on
399 * the required timings for the 8.4in panel, so we presently assume
402 static int realview_clcd_setup(struct clcd_fb *fb)
404 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
405 const char *panel_name, *vga_panel_name;
406 unsigned long framesize;
409 if (machine_is_realview_eb()) {
411 framesize = 640 * 480 * 2;
412 vga_panel_name = "VGA";
415 framesize = 1024 * 768 * 2;
416 vga_panel_name = "XVGA";
419 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
420 if (val == SYS_CLCD_ID_SANYO_3_8)
421 panel_name = "Sanyo TM38QV67A02A";
422 else if (val == SYS_CLCD_ID_SANYO_2_5)
423 panel_name = "Sanyo QVGA Portrait";
424 else if (val == SYS_CLCD_ID_EPSON_2_2)
425 panel_name = "Epson L2F50113T00";
426 else if (val == SYS_CLCD_ID_VGA)
427 panel_name = vga_panel_name;
429 pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
430 panel_name = vga_panel_name;
433 fb->panel = versatile_clcd_get_panel(panel_name);
437 return versatile_clcd_setup_dma(fb, framesize);
440 struct clcd_board clcd_plat_data = {
442 .caps = CLCD_CAP_ALL,
443 .check = clcdfb_check,
444 .decode = clcdfb_decode,
445 .disable = realview_clcd_disable,
446 .enable = realview_clcd_enable,
447 .setup = realview_clcd_setup,
448 .mmap = versatile_clcd_mmap_dma,
449 .remove = versatile_clcd_remove_dma,
453 #define VA_LEDS_BASE (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
455 void realview_leds_event(led_event_t ledevt)
459 u32 led = 1 << smp_processor_id();
461 local_irq_save(flags);
462 val = readl(VA_LEDS_BASE);
474 val = val ^ REALVIEW_SYS_LED7;
485 writel(val, VA_LEDS_BASE);
486 local_irq_restore(flags);
488 #endif /* CONFIG_LEDS */
491 * Where is the timer (VA)?
493 void __iomem *timer0_va_base;
494 void __iomem *timer1_va_base;
495 void __iomem *timer2_va_base;
496 void __iomem *timer3_va_base;
499 * Set up the clock source and clock events devices
501 void __init realview_timer_init(unsigned int timer_irq)
506 * set clock frequency:
507 * REALVIEW_REFCLK is 32KHz
508 * REALVIEW_TIMCLK is 1MHz
510 val = readl(__io_address(REALVIEW_SCTL_BASE));
511 writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
512 (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
513 (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
514 (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
515 __io_address(REALVIEW_SCTL_BASE));
518 * Initialise to a known state (all timers off)
520 writel(0, timer0_va_base + TIMER_CTRL);
521 writel(0, timer1_va_base + TIMER_CTRL);
522 writel(0, timer2_va_base + TIMER_CTRL);
523 writel(0, timer3_va_base + TIMER_CTRL);
525 sp804_clocksource_init(timer3_va_base);
526 sp804_clockevents_init(timer0_va_base, timer_irq);
530 * Setup the memory banks.
532 void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from,
533 struct meminfo *meminfo)
536 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
537 * Half of this is mirrored at 0.
539 #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
540 meminfo->bank[0].start = 0x70000000;
541 meminfo->bank[0].size = SZ_512M;
542 meminfo->nr_banks = 1;
544 meminfo->bank[0].start = 0;
545 meminfo->bank[0].size = SZ_256M;
546 meminfo->nr_banks = 1;