2 * linux/arch/arm/mach-realview/platsmp.c
4 * Copyright (C) 2002 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/smp.h>
18 #include <asm/cacheflush.h>
19 #include <mach/hardware.h>
20 #include <asm/mach-types.h>
22 #include <mach/board-eb.h>
23 #include <mach/board-pb11mp.h>
28 extern void realview_secondary_startup(void);
31 * control for which core is the next to come out of the secondary
34 volatile int __cpuinitdata pen_release = -1;
36 static void __iomem *scu_base_addr(void)
38 if (machine_is_realview_eb_mp())
39 return __io_address(REALVIEW_EB11MP_SCU_BASE);
40 else if (machine_is_realview_pb11mp())
41 return __io_address(REALVIEW_TC11MP_SCU_BASE);
43 return (void __iomem *)0;
46 static unsigned int __init get_core_count(void)
49 void __iomem *scu_base = scu_base_addr();
52 ncores = __raw_readl(scu_base + SCU_CONFIG);
53 ncores = (ncores & 0x03) + 1;
63 static void scu_enable(void)
66 void __iomem *scu_base = scu_base_addr();
68 scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
70 __raw_writel(scu_ctrl, scu_base + SCU_CTRL);
73 static DEFINE_SPINLOCK(boot_lock);
75 void __cpuinit platform_secondary_init(unsigned int cpu)
80 * the primary core may have used a "cross call" soft interrupt
81 * to get this processor out of WFI in the BootMonitor - make
82 * sure that we are no longer being sent this soft interrupt
84 smp_cross_call_done(cpumask_of_cpu(cpu));
87 * if any interrupts are already enabled for the primary
88 * core (e.g. timer irq), then they will not have been enabled
91 gic_cpu_init(0, gic_cpu_base_addr);
94 * let the primary processor know we're out of the
95 * pen, then head off into the C entry point
101 * Synchronise with the boot thread.
103 spin_lock(&boot_lock);
104 spin_unlock(&boot_lock);
107 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
109 unsigned long timeout;
112 * set synchronisation state between this boot processor
113 * and the secondary one
115 spin_lock(&boot_lock);
118 * The secondary processor is waiting to be released from
119 * the holding pen - release it, then wait for it to flag
120 * that it has been released by resetting pen_release.
122 * Note that "pen_release" is the hardware CPU ID, whereas
123 * "cpu" is Linux's internal ID.
131 * This is a later addition to the booting protocol: the
132 * bootMonitor now puts secondary cores into WFI, so
133 * poke_milo() no longer gets the cores moving; we need
134 * to send a soft interrupt to wake the secondary core.
135 * Use smp_cross_call() for this, since there's little
136 * point duplicating the code here
138 smp_cross_call(cpumask_of_cpu(cpu));
140 timeout = jiffies + (1 * HZ);
141 while (time_before(jiffies, timeout)) {
143 if (pen_release == -1)
150 * now the secondary core is starting up let it run its
151 * calibrations, then wait for it to finish
153 spin_unlock(&boot_lock);
155 return pen_release != -1 ? -ENOSYS : 0;
158 static void __init poke_milo(void)
160 extern void secondary_startup(void);
162 /* nobody is to be released from the pen yet */
166 * write the address of secondary startup into the system-wide
167 * flags register, then clear the bottom two bits, which is what
168 * BootMonitor is waiting for
171 #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
172 __raw_writel(virt_to_phys(realview_secondary_startup),
173 __io_address(REALVIEW_SYS_BASE) +
174 REALVIEW_SYS_FLAGSS_OFFSET);
175 #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
177 __io_address(REALVIEW_SYS_BASE) +
178 REALVIEW_SYS_FLAGSC_OFFSET);
185 * Initialise the CPU possible map early - this describes the CPUs
186 * which may be present or become present in the system.
188 void __init smp_init_cpus(void)
190 unsigned int i, ncores = get_core_count();
192 for (i = 0; i < ncores; i++)
193 cpu_set(i, cpu_possible_map);
196 void __init smp_prepare_cpus(unsigned int max_cpus)
198 unsigned int ncores = get_core_count();
199 unsigned int cpu = smp_processor_id();
205 "Realview: strange CM count of 0? Default to 1\n");
210 if (ncores > NR_CPUS) {
212 "Realview: no. of cores (%d) greater than configured "
213 "maximum of %d - clipping\n",
218 smp_store_cpu_info(cpu);
221 * are we trying to boot more cores than exist?
223 if (max_cpus > ncores)
226 #ifdef CONFIG_LOCAL_TIMERS
228 * Enable the local timer for primary CPU. If the device is
229 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
230 * realview_timer_init
236 * Initialise the present map, which describes the set of CPUs
237 * actually populated at the present time.
239 for (i = 0; i < max_cpus; i++)
240 cpu_set(i, cpu_present_map);
243 * Initialise the SCU if there are more than one CPU and let
244 * them know where to start. Note that, on modern versions of
245 * MILO, the "poke" doesn't actually do anything until each
246 * individual core is sent a soft interrupt to get it out of