2 * linux/arch/arm/mach-realview/realview_pb1176.c
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
30 #include <mach/hardware.h>
33 #include <asm/mach-types.h>
35 #include <asm/pgtable.h>
36 #include <asm/hardware/gic.h>
37 #include <asm/hardware/cache-l2x0.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/flash.h>
41 #include <asm/mach/map.h>
42 #include <asm/mach/time.h>
44 #include <mach/board-pb1176.h>
45 #include <mach/irqs.h>
49 static struct map_desc realview_pb1176_io_desc[] __initdata = {
51 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
52 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
56 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
57 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
61 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
62 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
66 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
67 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
71 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
72 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
76 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
77 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
81 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
82 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
86 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
87 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
91 .virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
92 .pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
96 #ifdef CONFIG_DEBUG_LL
98 .virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
99 .pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
106 static void __init realview_pb1176_map_io(void)
108 iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
111 static struct pl061_platform_data gpio0_plat_data = {
116 static struct pl061_platform_data gpio1_plat_data = {
121 static struct pl061_platform_data gpio2_plat_data = {
127 * RealView PB1176 AMBA devices
129 #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ }
130 #define GPIO2_DMA { 0, 0 }
131 #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ }
132 #define GPIO3_DMA { 0, 0 }
133 #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ }
134 #define AACI_DMA { 0x80, 0x81 }
135 #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
136 #define MMCI0_DMA { 0x84, 0 }
137 #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ }
138 #define KMI0_DMA { 0, 0 }
139 #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ }
140 #define KMI1_DMA { 0, 0 }
141 #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
142 #define PB1176_SMC_DMA { 0, 0 }
143 #define MPMC_IRQ { NO_IRQ, NO_IRQ }
144 #define MPMC_DMA { 0, 0 }
145 #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
146 #define PB1176_CLCD_DMA { 0, 0 }
147 #define DMAC_IRQ { IRQ_PB1176_DMAC, NO_IRQ }
148 #define DMAC_DMA { 0, 0 }
149 #define SCTL_IRQ { NO_IRQ, NO_IRQ }
150 #define SCTL_DMA { 0, 0 }
151 #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
152 #define PB1176_WATCHDOG_DMA { 0, 0 }
153 #define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ }
154 #define PB1176_GPIO0_DMA { 0, 0 }
155 #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ }
156 #define GPIO1_DMA { 0, 0 }
157 #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
158 #define PB1176_RTC_DMA { 0, 0 }
159 #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ }
160 #define SCI_DMA { 7, 6 }
161 #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ }
162 #define PB1176_UART0_DMA { 15, 14 }
163 #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ }
164 #define PB1176_UART1_DMA { 13, 12 }
165 #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ }
166 #define PB1176_UART2_DMA { 11, 10 }
167 #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
168 #define PB1176_UART3_DMA { 0x86, 0x87 }
169 #define PB1176_SSP_IRQ { IRQ_PB1176_SSP, NO_IRQ }
170 #define PB1176_SSP_DMA { 9, 8 }
172 /* FPGA Primecells */
173 AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
174 AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
175 AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
176 AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
177 AMBA_DEVICE(uart3, "fpga:uart3", PB1176_UART3, NULL);
179 /* DevChip Primecells */
180 AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
181 AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
182 AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
183 AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
184 AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
185 AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
186 AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
187 AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
188 AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
189 AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
190 AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
191 AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, NULL);
193 /* Primecells on the NEC ISSP chip */
194 AMBA_DEVICE(clcd, "issp:clcd", PB1176_CLCD, &clcd_plat_data);
195 //AMBA_DEVICE(dmac, "issp:dmac", PB1176_DMAC, NULL);
197 static struct amba_device *amba_devs[] __initdata = {
220 * RealView PB1176 platform devices
222 static struct resource realview_pb1176_flash_resources[] = {
224 .start = REALVIEW_PB1176_FLASH_BASE,
225 .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
226 .flags = IORESOURCE_MEM,
229 .start = REALVIEW_PB1176_SEC_FLASH_BASE,
230 .end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
231 .flags = IORESOURCE_MEM,
234 #ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
235 #define PB1176_FLASH_BLOCKS 2
237 #define PB1176_FLASH_BLOCKS 1
240 static struct resource realview_pb1176_smsc911x_resources[] = {
242 .start = REALVIEW_PB1176_ETH_BASE,
243 .end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
244 .flags = IORESOURCE_MEM,
247 .start = IRQ_PB1176_ETH,
248 .end = IRQ_PB1176_ETH,
249 .flags = IORESOURCE_IRQ,
253 static struct resource realview_pb1176_isp1761_resources[] = {
255 .start = REALVIEW_PB1176_USB_BASE,
256 .end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
257 .flags = IORESOURCE_MEM,
260 .start = IRQ_PB1176_USB,
261 .end = IRQ_PB1176_USB,
262 .flags = IORESOURCE_IRQ,
266 static struct resource pmu_resource = {
267 .start = IRQ_DC1176_CORE_PMU,
268 .end = IRQ_DC1176_CORE_PMU,
269 .flags = IORESOURCE_IRQ,
272 static struct platform_device pmu_device = {
274 .id = ARM_PMU_DEVICE_CPU,
276 .resource = &pmu_resource,
279 static void __init gic_init_irq(void)
281 /* ARM1176 DevChip GIC, primary */
282 gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
283 gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
284 gic_cpu_init(0, gic_cpu_base_addr);
286 /* board GIC, secondary */
287 gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
288 gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
289 gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
292 static void __init realview_pb1176_timer_init(void)
294 timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
295 timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
296 timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
297 timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
299 realview_timer_init(IRQ_DC1176_TIMER0);
302 static struct sys_timer realview_pb1176_timer = {
303 .init = realview_pb1176_timer_init,
306 static void realview_pb1176_reset(char mode)
308 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
309 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
310 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
311 __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
314 static void realview_pb1176_fixup(struct machine_desc *mdesc,
315 struct tag *tags, char **from,
316 struct meminfo *meminfo)
319 * RealView PB1176 only has 128MB of RAM mapped at 0.
321 meminfo->bank[0].start = 0;
322 meminfo->bank[0].size = SZ_128M;
323 meminfo->nr_banks = 1;
326 static void __init realview_pb1176_init(void)
330 #ifdef CONFIG_CACHE_L2X0
331 /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
332 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
335 realview_flash_register(realview_pb1176_flash_resources,
336 PB1176_FLASH_BLOCKS);
337 realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
338 platform_device_register(&realview_i2c_device);
339 realview_usb_register(realview_pb1176_isp1761_resources);
340 platform_device_register(&pmu_device);
342 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
343 struct amba_device *d = amba_devs[i];
344 amba_device_register(d, &iomem_resource);
348 leds_event = realview_leds_event;
350 realview_reset = realview_pb1176_reset;
353 MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
354 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
355 .phys_io = REALVIEW_PB1176_UART0_BASE & SECTION_MASK,
356 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
357 .boot_params = PHYS_OFFSET + 0x00000100,
358 .fixup = realview_pb1176_fixup,
359 .map_io = realview_pb1176_map_io,
360 .init_irq = gic_init_irq,
361 .timer = &realview_pb1176_timer,
362 .init_machine = realview_pb1176_init,