2 * linux/arch/arm/mach-realview/realview_pb11mp.c
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
30 #include <mach/hardware.h>
33 #include <asm/mach-types.h>
35 #include <asm/pgtable.h>
36 #include <asm/hardware/gic.h>
37 #include <asm/hardware/cache-l2x0.h>
38 #include <asm/localtimer.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/flash.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/time.h>
45 #include <mach/board-pb11mp.h>
46 #include <mach/irqs.h>
50 static struct map_desc realview_pb11mp_io_desc[] __initdata = {
52 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
53 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
57 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
58 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
62 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
63 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
67 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
68 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
72 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
73 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
77 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
78 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
82 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
83 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
87 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
88 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
92 .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
93 .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
97 #ifdef CONFIG_DEBUG_LL
99 .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
100 .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
107 static void __init realview_pb11mp_map_io(void)
109 iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
112 static struct pl061_platform_data gpio0_plat_data = {
117 static struct pl061_platform_data gpio1_plat_data = {
122 static struct pl061_platform_data gpio2_plat_data = {
128 * RealView PB11MPCore AMBA devices
131 #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ }
132 #define GPIO2_DMA { 0, 0 }
133 #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ }
134 #define GPIO3_DMA { 0, 0 }
135 #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ }
136 #define AACI_DMA { 0x80, 0x81 }
137 #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
138 #define MMCI0_DMA { 0x84, 0 }
139 #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ }
140 #define KMI0_DMA { 0, 0 }
141 #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ }
142 #define KMI1_DMA { 0, 0 }
143 #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ }
144 #define PB11MP_SMC_DMA { 0, 0 }
145 #define MPMC_IRQ { NO_IRQ, NO_IRQ }
146 #define MPMC_DMA { 0, 0 }
147 #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ }
148 #define PB11MP_CLCD_DMA { 0, 0 }
149 #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ }
150 #define DMAC_DMA { 0, 0 }
151 #define SCTL_IRQ { NO_IRQ, NO_IRQ }
152 #define SCTL_DMA { 0, 0 }
153 #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ }
154 #define PB11MP_WATCHDOG_DMA { 0, 0 }
155 #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ }
156 #define PB11MP_GPIO0_DMA { 0, 0 }
157 #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ }
158 #define GPIO1_DMA { 0, 0 }
159 #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ }
160 #define PB11MP_RTC_DMA { 0, 0 }
161 #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ }
162 #define SCI_DMA { 7, 6 }
163 #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ }
164 #define PB11MP_UART0_DMA { 15, 14 }
165 #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ }
166 #define PB11MP_UART1_DMA { 13, 12 }
167 #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ }
168 #define PB11MP_UART2_DMA { 11, 10 }
169 #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ }
170 #define PB11MP_UART3_DMA { 0x86, 0x87 }
171 #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ }
172 #define PB11MP_SSP_DMA { 9, 8 }
174 /* FPGA Primecells */
175 AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
176 AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
177 AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
178 AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
179 AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL);
181 /* DevChip Primecells */
182 AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL);
183 AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
184 AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL);
185 AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data);
186 AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
187 AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
188 AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL);
189 AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
190 AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL);
191 AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL);
192 AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL);
193 AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, NULL);
195 /* Primecells on the NEC ISSP chip */
196 AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data);
197 AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL);
199 static struct amba_device *amba_devs[] __initdata = {
222 * RealView PB11MPCore platform devices
224 static struct resource realview_pb11mp_flash_resource[] = {
226 .start = REALVIEW_PB11MP_FLASH0_BASE,
227 .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
228 .flags = IORESOURCE_MEM,
231 .start = REALVIEW_PB11MP_FLASH1_BASE,
232 .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
233 .flags = IORESOURCE_MEM,
237 static struct resource realview_pb11mp_smsc911x_resources[] = {
239 .start = REALVIEW_PB11MP_ETH_BASE,
240 .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
241 .flags = IORESOURCE_MEM,
244 .start = IRQ_TC11MP_ETH,
245 .end = IRQ_TC11MP_ETH,
246 .flags = IORESOURCE_IRQ,
250 static struct resource realview_pb11mp_isp1761_resources[] = {
252 .start = REALVIEW_PB11MP_USB_BASE,
253 .end = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
254 .flags = IORESOURCE_MEM,
257 .start = IRQ_TC11MP_USB,
258 .end = IRQ_TC11MP_USB,
259 .flags = IORESOURCE_IRQ,
263 static struct resource pmu_resources[] = {
265 .start = IRQ_TC11MP_PMU_CPU0,
266 .end = IRQ_TC11MP_PMU_CPU0,
267 .flags = IORESOURCE_IRQ,
270 .start = IRQ_TC11MP_PMU_CPU1,
271 .end = IRQ_TC11MP_PMU_CPU1,
272 .flags = IORESOURCE_IRQ,
275 .start = IRQ_TC11MP_PMU_CPU2,
276 .end = IRQ_TC11MP_PMU_CPU2,
277 .flags = IORESOURCE_IRQ,
280 .start = IRQ_TC11MP_PMU_CPU3,
281 .end = IRQ_TC11MP_PMU_CPU3,
282 .flags = IORESOURCE_IRQ,
286 static struct platform_device pmu_device = {
288 .id = ARM_PMU_DEVICE_CPU,
289 .num_resources = ARRAY_SIZE(pmu_resources),
290 .resource = pmu_resources,
293 static void __init gic_init_irq(void)
295 unsigned int pldctrl;
297 /* new irq mode with no DCC */
298 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
299 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
301 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
302 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
304 /* ARM11MPCore test chip GIC, primary */
305 gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE);
306 gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29);
307 gic_cpu_init(0, gic_cpu_base_addr);
309 /* board GIC, secondary */
310 gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START);
311 gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
312 gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
315 static void __init realview_pb11mp_timer_init(void)
317 timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
318 timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
319 timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
320 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
322 #ifdef CONFIG_LOCAL_TIMERS
323 twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
325 realview_timer_init(IRQ_TC11MP_TIMER0_1);
328 static struct sys_timer realview_pb11mp_timer = {
329 .init = realview_pb11mp_timer_init,
332 static void realview_pb11mp_reset(char mode)
334 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
335 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
338 * To reset, we hit the on-board reset register
341 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
342 __raw_writel(0x0000, reset_ctrl);
343 __raw_writel(0x0004, reset_ctrl);
346 static void __init realview_pb11mp_init(void)
350 #ifdef CONFIG_CACHE_L2X0
351 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
352 * Bits: .... ...0 0111 1001 0000 .... .... .... */
353 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
356 realview_flash_register(realview_pb11mp_flash_resource,
357 ARRAY_SIZE(realview_pb11mp_flash_resource));
358 realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
359 platform_device_register(&realview_i2c_device);
360 platform_device_register(&realview_cf_device);
361 realview_usb_register(realview_pb11mp_isp1761_resources);
362 platform_device_register(&pmu_device);
364 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
365 struct amba_device *d = amba_devs[i];
366 amba_device_register(d, &iomem_resource);
370 leds_event = realview_leds_event;
372 realview_reset = realview_pb11mp_reset;
375 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
376 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
377 .phys_io = REALVIEW_PB11MP_UART0_BASE & SECTION_MASK,
378 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
379 .boot_params = PHYS_OFFSET + 0x00000100,
380 .fixup = realview_fixup,
381 .map_io = realview_pb11mp_map_io,
382 .init_irq = gic_init_irq,
383 .timer = &realview_pb11mp_timer,
384 .init_machine = realview_pb11mp_init,