2 * linux/arch/arm/mach-rpc/dma.c
4 * Copyright (C) 1998 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA functions specific to RiscPC architecture
12 #include <linux/slab.h>
13 #include <linux/mman.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/dma-mapping.h>
23 #include <mach/hardware.h>
24 #include <asm/uaccess.h>
26 #include <asm/mach/dma.h>
27 #include <asm/hardware/iomd.h>
38 #define TRANSFER_SIZE 2
41 #define ENDA (IOMD_IO0ENDA - IOMD_IO0CURA)
42 #define CURB (IOMD_IO0CURB - IOMD_IO0CURA)
43 #define ENDB (IOMD_IO0ENDB - IOMD_IO0CURA)
44 #define CR (IOMD_IO0CR - IOMD_IO0CURA)
45 #define ST (IOMD_IO0ST - IOMD_IO0CURA)
47 static void iomd_get_next_sg(struct scatterlist *sg, struct iomd_dma *idma)
49 unsigned long end, offset, flags = 0;
52 sg->dma_address = idma->dma.sg->dma_address;
53 offset = sg->dma_address & ~PAGE_MASK;
55 end = offset + idma->dma.sg->length;
60 if (offset + TRANSFER_SIZE >= end)
63 sg->length = end - TRANSFER_SIZE;
65 idma->dma.sg->length -= end - offset;
66 idma->dma.sg->dma_address += end - offset;
68 if (idma->dma.sg->length == 0) {
69 if (idma->dma.sgcount > 1) {
70 idma->dma.sg = sg_next(idma->dma.sg);
78 flags = DMA_END_S | DMA_END_L;
86 static irqreturn_t iomd_dma_handle(int irq, void *dev_id)
88 struct iomd_dma *idma = dev_id;
89 unsigned long base = idma->base;
94 status = iomd_readb(base + ST);
95 if (!(status & DMA_ST_INT))
98 if ((idma->state ^ status) & DMA_ST_AB)
99 iomd_get_next_sg(&idma->cur_sg, idma);
101 switch (status & (DMA_ST_OFL | DMA_ST_AB)) {
102 case DMA_ST_OFL: /* OIA */
103 case DMA_ST_AB: /* .IB */
104 iomd_writel(idma->cur_sg.dma_address, base + CURA);
105 iomd_writel(idma->cur_sg.length, base + ENDA);
106 idma->state = DMA_ST_AB;
109 case DMA_ST_OFL | DMA_ST_AB: /* OIB */
111 iomd_writel(idma->cur_sg.dma_address, base + CURB);
112 iomd_writel(idma->cur_sg.length, base + ENDB);
117 if (status & DMA_ST_OFL &&
118 idma->cur_sg.length == (DMA_END_S|DMA_END_L))
122 idma->state = ~DMA_ST_AB;
128 static int iomd_request_dma(unsigned int chan, dma_t *dma)
130 struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma);
132 return request_irq(idma->irq, iomd_dma_handle,
133 IRQF_DISABLED, idma->dma.device_id, idma);
136 static void iomd_free_dma(unsigned int chan, dma_t *dma)
138 struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma);
140 free_irq(idma->irq, idma);
143 static void iomd_enable_dma(unsigned int chan, dma_t *dma)
145 struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma);
146 unsigned long dma_base = idma->base;
147 unsigned int ctrl = TRANSFER_SIZE | DMA_CR_E;
149 if (idma->dma.invalid) {
150 idma->dma.invalid = 0;
153 * Cope with ISA-style drivers which expect cache
157 idma->dma.sg = &idma->dma.buf;
158 idma->dma.sgcount = 1;
159 idma->dma.buf.length = idma->dma.count;
160 idma->dma.buf.dma_address = dma_map_single(NULL,
161 idma->dma.addr, idma->dma.count,
162 idma->dma.dma_mode == DMA_MODE_READ ?
163 DMA_FROM_DEVICE : DMA_TO_DEVICE);
166 iomd_writeb(DMA_CR_C, dma_base + CR);
167 idma->state = DMA_ST_AB;
170 if (idma->dma.dma_mode == DMA_MODE_READ)
173 iomd_writeb(ctrl, dma_base + CR);
174 enable_irq(idma->irq);
177 static void iomd_disable_dma(unsigned int chan, dma_t *dma)
179 struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma);
180 unsigned long dma_base = idma->base;
183 local_irq_save(flags);
184 if (idma->state != ~DMA_ST_AB)
185 disable_irq(idma->irq);
186 iomd_writeb(0, dma_base + CR);
187 local_irq_restore(flags);
190 static int iomd_set_dma_speed(unsigned int chan, dma_t *dma, int cycle)
196 else if (cycle <= 250)
198 else if (cycle < 438)
203 tcr = iomd_readb(IOMD_DMATCR);
208 tcr = (tcr & ~0x03) | speed;
212 tcr = (tcr & ~0x0c) | (speed << 2);
216 tcr = (tcr & ~0x30) | (speed << 4);
220 tcr = (tcr & ~0xc0) | (speed << 6);
227 iomd_writeb(tcr, IOMD_DMATCR);
232 static struct dma_ops iomd_dma_ops = {
234 .request = iomd_request_dma,
235 .free = iomd_free_dma,
236 .enable = iomd_enable_dma,
237 .disable = iomd_disable_dma,
238 .setspeed = iomd_set_dma_speed,
241 static struct fiq_handler fh = {
245 static void floppy_enable_dma(unsigned int chan, dma_t *dma)
247 struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma);
248 void *fiqhandler_start;
249 unsigned int fiqhandler_length;
255 if (fdma->dma.dma_mode == DMA_MODE_READ) {
256 extern unsigned char floppy_fiqin_start, floppy_fiqin_end;
257 fiqhandler_start = &floppy_fiqin_start;
258 fiqhandler_length = &floppy_fiqin_end - &floppy_fiqin_start;
260 extern unsigned char floppy_fiqout_start, floppy_fiqout_end;
261 fiqhandler_start = &floppy_fiqout_start;
262 fiqhandler_length = &floppy_fiqout_end - &floppy_fiqout_start;
265 regs.ARM_r9 = fdma->dma.count;
266 regs.ARM_r10 = (unsigned long)fdma->dma.addr;
267 regs.ARM_fp = (unsigned long)FLOPPYDMA_BASE;
269 if (claim_fiq(&fh)) {
270 printk("floppydma: couldn't claim FIQ.\n");
274 set_fiq_handler(fiqhandler_start, fiqhandler_length);
276 enable_fiq(fdma->fiq);
279 static void floppy_disable_dma(unsigned int chan, dma_t *dma)
281 struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma);
282 disable_fiq(fdma->fiq);
286 static int floppy_get_residue(unsigned int chan, dma_t *dma)
293 static struct dma_ops floppy_dma_ops = {
295 .enable = floppy_enable_dma,
296 .disable = floppy_disable_dma,
297 .residue = floppy_get_residue,
301 * This is virtual DMA - we don't need anything here.
303 static void sound_enable_disable_dma(unsigned int chan, dma_t *dma)
307 static struct dma_ops sound_dma_ops = {
309 .enable = sound_enable_disable_dma,
310 .disable = sound_enable_disable_dma,
313 static struct iomd_dma iomd_dma[6];
315 static struct floppy_dma floppy_dma = {
317 .d_ops = &floppy_dma_ops,
319 .fiq = FIQ_FLOPPYDATA,
322 static dma_t sound_dma = {
323 .d_ops = &sound_dma_ops,
326 static int __init rpc_dma_init(void)
331 iomd_writeb(0, IOMD_IO0CR);
332 iomd_writeb(0, IOMD_IO1CR);
333 iomd_writeb(0, IOMD_IO2CR);
334 iomd_writeb(0, IOMD_IO3CR);
336 iomd_writeb(0xa0, IOMD_DMATCR);
339 * Setup DMA channels 2,3 to be for podules
340 * and channels 0,1 for internal devices
342 iomd_writeb(DMA_EXT_IO3|DMA_EXT_IO2, IOMD_DMAEXT);
344 iomd_dma[DMA_0].base = IOMD_IO0CURA;
345 iomd_dma[DMA_0].irq = IRQ_DMA0;
346 iomd_dma[DMA_1].base = IOMD_IO1CURA;
347 iomd_dma[DMA_1].irq = IRQ_DMA1;
348 iomd_dma[DMA_2].base = IOMD_IO2CURA;
349 iomd_dma[DMA_2].irq = IRQ_DMA2;
350 iomd_dma[DMA_3].base = IOMD_IO3CURA;
351 iomd_dma[DMA_3].irq = IRQ_DMA3;
352 iomd_dma[DMA_S0].base = IOMD_SD0CURA;
353 iomd_dma[DMA_S0].irq = IRQ_DMAS0;
354 iomd_dma[DMA_S1].base = IOMD_SD1CURA;
355 iomd_dma[DMA_S1].irq = IRQ_DMAS1;
357 for (i = DMA_0; i <= DMA_S1; i++) {
358 iomd_dma[i].dma.d_ops = &iomd_dma_ops;
360 ret = isa_dma_add(i, &iomd_dma[i].dma);
362 printk("IOMDDMA%u: unable to register: %d\n", i, ret);
365 ret = isa_dma_add(DMA_VIRTUAL_FLOPPY, &floppy_dma.dma);
367 printk("IOMDFLOPPY: unable to register: %d\n", ret);
368 ret = isa_dma_add(DMA_VIRTUAL_SOUND, &sound_dma);
370 printk("IOMDSOUND: unable to register: %d\n", ret);
373 core_initcall(rpc_dma_init);