1 /* linux/arch/arm/mach-s3c2440/mach-rx3715.c
3 * Copyright (c) 2003-2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * http://www.handhelds.org/projects/rx3715.html
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/memblock.h>
19 #include <linux/timer.h>
20 #include <linux/init.h>
21 #include <linux/tty.h>
22 #include <linux/console.h>
23 #include <linux/sysdev.h>
24 #include <linux/platform_device.h>
25 #include <linux/serial_core.h>
26 #include <linux/serial.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/nand.h>
30 #include <linux/mtd/nand_ecc.h>
31 #include <linux/mtd/partitions.h>
33 #include <asm/mach/arch.h>
34 #include <asm/mach/map.h>
35 #include <asm/mach/irq.h>
37 #include <mach/hardware.h>
39 #include <asm/mach-types.h>
41 #include <plat/regs-serial.h>
42 #include <mach/regs-gpio.h>
43 #include <mach/regs-lcd.h>
45 #include <mach/h1940.h>
46 #include <plat/nand.h>
49 #include <plat/clock.h>
50 #include <plat/devs.h>
56 static struct map_desc rx3715_iodesc[] __initdata = {
57 /* dump ISA space somewhere unused */
60 .virtual = (u32)S3C24XX_VA_ISA_WORD,
61 .pfn = __phys_to_pfn(S3C2410_CS3),
65 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
66 .pfn = __phys_to_pfn(S3C2410_CS3),
73 static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
82 static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
89 .clocks = rx3715_serial_clocks,
90 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
98 .clocks = rx3715_serial_clocks,
99 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
104 .uart_flags = UPF_CONS_FLOW,
108 .clocks = rx3715_serial_clocks,
109 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
113 /* framebuffer lcd controller information */
115 static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
116 .lcdcon5 = S3C2410_LCDCON5_INVVLINE |
117 S3C2410_LCDCON5_FRM565 |
118 S3C2410_LCDCON5_HWSWP,
120 .type = S3C2410_LCDCON1_TFT,
136 static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
138 .displays = &rx3715_lcdcfg,
140 .default_display = 0,
144 .gpccon = 0xaa955699,
145 .gpccon_mask = 0xffc003cc,
147 .gpcup_mask = 0xffffffff,
149 .gpdcon = 0xaa95aaa1,
150 .gpdcon_mask = 0xffc0fff0,
152 .gpdup_mask = 0xffffffff,
155 static struct mtd_partition __initdata rx3715_nand_part[] = {
157 .name = "Whole Flash",
159 .size = MTDPART_SIZ_FULL,
160 .mask_flags = MTD_WRITEABLE,
164 static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = {
168 .nr_partitions = ARRAY_SIZE(rx3715_nand_part),
169 .partitions = rx3715_nand_part,
173 static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
177 .nr_sets = ARRAY_SIZE(rx3715_nand_sets),
178 .sets = rx3715_nand_sets,
181 static struct platform_device *rx3715_devices[] __initdata = {
190 static void __init rx3715_map_io(void)
192 s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
193 s3c24xx_init_clocks(16934000);
194 s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
197 /* H1940 and RX3715 need to reserve this for suspend */
198 static void __init rx3715_reserve(void)
200 memblock_reserve(0x30003000, 0x1000);
201 memblock_reserve(0x30081000, 0x1000);
204 static void __init rx3715_init_irq(void)
209 static void __init rx3715_init_machine(void)
211 #ifdef CONFIG_PM_H1940
212 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
216 s3c_nand_set_platdata(&rx3715_nand_info);
217 s3c24xx_fb_set_platdata(&rx3715_fb_info);
218 platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
221 MACHINE_START(RX3715, "IPAQ-RX3715")
222 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
223 .atag_offset = 0x100,
224 .map_io = rx3715_map_io,
225 .reserve = rx3715_reserve,
226 .init_irq = rx3715_init_irq,
227 .init_machine = rx3715_init_machine,
228 .timer = &s3c24xx_timer,
229 .restart = s3c2440_restart,