1 /* linux/arch/arm/mach-s3c2412/dma.c
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2412 DMA selection
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/serial_core.h>
23 #include <plat/dma-s3c24xx.h>
26 #include <plat/regs-serial.h>
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-dma.h>
29 #include <mach/regs-lcd.h>
30 #include <mach/regs-sdi.h>
31 #include <plat/regs-spi.h>
33 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
35 static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
38 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
39 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
43 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
44 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
48 .channels = MAP(S3C2412_DMAREQSEL_SDI),
49 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
53 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
54 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
58 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
59 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
63 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
64 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
68 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
69 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
73 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
74 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
76 [DMACH_UART0_SRC2] = {
78 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
79 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
81 [DMACH_UART1_SRC2] = {
83 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
84 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
86 [DMACH_UART2_SRC2] = {
88 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
89 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
93 .channels = MAP(S3C2412_DMAREQSEL_TIMER),
94 .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
98 .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
99 .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
103 .channels = MAP(S3C2412_DMAREQSEL_I2STX),
104 .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
108 .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
109 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
113 .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
114 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
118 .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
119 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
123 .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
124 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
128 static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
129 struct s3c24xx_dma_map *map,
130 enum dma_data_direction dir)
134 if (dir == DMA_FROM_DEVICE)
135 chsel = map->channels_rx[0];
137 chsel = map->channels[0];
139 chsel &= ~DMA_CH_VALID;
140 chsel |= S3C2412_DMAREQSEL_HW;
142 writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
145 static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
146 struct s3c24xx_dma_map *map)
148 s3c2412_dma_direction(chan, map, chan->source);
151 static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
152 .select = s3c2412_dma_select,
153 .direction = s3c2412_dma_direction,
155 .map = s3c2412_dma_mappings,
156 .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
159 static int __init s3c2412_dma_add(struct device *dev,
160 struct subsys_interface *sif)
163 return s3c24xx_dma_init_map(&s3c2412_dma_sel);
166 static struct subsys_interface s3c2412_dma_interface = {
167 .name = "s3c2412_dma",
168 .subsys = &s3c2412_subsys,
169 .add_dev = s3c2412_dma_add,
172 static int __init s3c2412_dma_init(void)
174 return subsys_interface_register(&s3c2412_dma_interface);
177 arch_initcall(s3c2412_dma_init);