1 /* linux/arch/arm/mach-s3c2412/dma.c
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2412 DMA selection
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/serial_core.h>
23 #include <plat/dma-s3c24xx.h>
26 #include <plat/regs-serial.h>
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-ac97.h>
29 #include <plat/regs-dma.h>
30 #include <mach/regs-lcd.h>
31 #include <mach/regs-sdi.h>
32 #include <plat/regs-iis.h>
33 #include <plat/regs-spi.h>
35 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
37 static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
40 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
41 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
45 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
46 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
50 .channels = MAP(S3C2412_DMAREQSEL_SDI),
51 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
55 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
56 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
60 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
61 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
65 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
66 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
70 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
71 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
75 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
76 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
78 [DMACH_UART0_SRC2] = {
80 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
81 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
83 [DMACH_UART1_SRC2] = {
85 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
86 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
88 [DMACH_UART2_SRC2] = {
90 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
91 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
95 .channels = MAP(S3C2412_DMAREQSEL_TIMER),
96 .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
100 .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
101 .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
105 .channels = MAP(S3C2412_DMAREQSEL_I2STX),
106 .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
110 .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
111 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
115 .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
116 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
120 .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
121 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
125 .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
126 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
130 static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
131 struct s3c24xx_dma_map *map,
132 enum dma_data_direction dir)
136 if (dir == DMA_FROM_DEVICE)
137 chsel = map->channels_rx[0];
139 chsel = map->channels[0];
141 chsel &= ~DMA_CH_VALID;
142 chsel |= S3C2412_DMAREQSEL_HW;
144 writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
147 static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
148 struct s3c24xx_dma_map *map)
150 s3c2412_dma_direction(chan, map, chan->source);
153 static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
154 .select = s3c2412_dma_select,
155 .direction = s3c2412_dma_direction,
157 .map = s3c2412_dma_mappings,
158 .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
161 static int __init s3c2412_dma_add(struct device *dev,
162 struct subsys_interface *sif)
165 return s3c24xx_dma_init_map(&s3c2412_dma_sel);
168 static struct subsys_interface s3c2412_dma_interface = {
169 .name = "s3c2412_dma",
170 .subsys = &s3c2412_subsys,
171 .add_dev = s3c2412_dma_add,
174 static int __init s3c2412_dma_init(void)
176 return subsys_interface_register(&s3c2412_dma_interface);
179 arch_initcall(s3c2412_dma_init);