arch/arm/mach-s3c24xx/dma-s3c2443.c

   1 /* linux/arch/arm/mach-s3c2443/dma.c
   2  *
   3  * Copyright (c) 2007 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2443 DMA selection
   7  *
   8  * http://armlinux.simtec.co.uk/
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/serial_core.h>
  19 #include <linux/io.h>
  20
  21 #include <mach/dma.h>
  22
  23 #include <plat/dma-s3c24xx.h>
  24 #include <plat/cpu.h>
  25
  26 #include <plat/regs-serial.h>
  27 #include <mach/regs-gpio.h>
  28 #include <plat/regs-ac97.h>
  29 #include <plat/regs-dma.h>
  30 #include <mach/regs-lcd.h>
  31 #include <plat/regs-iis.h>
  32 #include <plat/regs-spi.h>
  33
  34 #define MAP(x) { \
  35                 [0]     = (x) | DMA_CH_VALID,   \
  36                 [1]     = (x) | DMA_CH_VALID,   \
  37                 [2]     = (x) | DMA_CH_VALID,   \
  38                 [3]     = (x) | DMA_CH_VALID,   \
  39                 [4]     = (x) | DMA_CH_VALID,   \
  40                 [5]     = (x) | DMA_CH_VALID,   \
  41         }
  42
  43 static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
  44         [DMACH_XD0] = {
  45                 .name           = "xdreq0",
  46                 .channels       = MAP(S3C2443_DMAREQSEL_XDREQ0),
  47         },
  48         [DMACH_XD1] = {
  49                 .name           = "xdreq1",
  50                 .channels       = MAP(S3C2443_DMAREQSEL_XDREQ1),
  51         },
  52         [DMACH_SDI] = { /* only on S3C2443 */
  53                 .name           = "sdi",
  54                 .channels       = MAP(S3C2443_DMAREQSEL_SDI),
  55         },
  56         [DMACH_SPI0_RX] = {
  57                 .name           = "spi0-rx",
  58                 .channels       = MAP(S3C2443_DMAREQSEL_SPI0RX),
  59         },
  60         [DMACH_SPI0_TX] = {
  61                 .name           = "spi0-tx",
  62                 .channels       = MAP(S3C2443_DMAREQSEL_SPI0TX),
  63         },
  64         [DMACH_SPI1_RX] = { /* only on S3C2443/S3C2450 */
  65                 .name           = "spi1-rx",
  66                 .channels       = MAP(S3C2443_DMAREQSEL_SPI1RX),
  67         },
  68         [DMACH_SPI1_TX] = { /* only on S3C2443/S3C2450 */
  69                 .name           = "spi1-tx",
  70                 .channels       = MAP(S3C2443_DMAREQSEL_SPI1TX),
  71         },
  72         [DMACH_UART0] = {
  73                 .name           = "uart0",
  74                 .channels       = MAP(S3C2443_DMAREQSEL_UART0_0),
  75         },
  76         [DMACH_UART1] = {
  77                 .name           = "uart1",
  78                 .channels       = MAP(S3C2443_DMAREQSEL_UART1_0),
  79         },
  80         [DMACH_UART2] = {
  81                 .name           = "uart2",
  82                 .channels       = MAP(S3C2443_DMAREQSEL_UART2_0),
  83         },
  84         [DMACH_UART3] = {
  85                 .name           = "uart3",
  86                 .channels       = MAP(S3C2443_DMAREQSEL_UART3_0),
  87         },
  88         [DMACH_UART0_SRC2] = {
  89                 .name           = "uart0",
  90                 .channels       = MAP(S3C2443_DMAREQSEL_UART0_1),
  91         },
  92         [DMACH_UART1_SRC2] = {
  93                 .name           = "uart1",
  94                 .channels       = MAP(S3C2443_DMAREQSEL_UART1_1),
  95         },
  96         [DMACH_UART2_SRC2] = {
  97                 .name           = "uart2",
  98                 .channels       = MAP(S3C2443_DMAREQSEL_UART2_1),
  99         },
 100         [DMACH_UART3_SRC2] = {
 101                 .name           = "uart3",
 102                 .channels       = MAP(S3C2443_DMAREQSEL_UART3_1),
 103         },
 104         [DMACH_TIMER] = {
 105                 .name           = "timer",
 106                 .channels       = MAP(S3C2443_DMAREQSEL_TIMER),
 107         },
 108         [DMACH_I2S_IN] = {
 109                 .name           = "i2s-sdi",
 110                 .channels       = MAP(S3C2443_DMAREQSEL_I2SRX),
 111         },
 112         [DMACH_I2S_OUT] = {
 113                 .name           = "i2s-sdo",
 114                 .channels       = MAP(S3C2443_DMAREQSEL_I2STX),
 115         },
 116         [DMACH_PCM_IN] = {
 117                 .name           = "pcm-in",
 118                 .channels       = MAP(S3C2443_DMAREQSEL_PCMIN),
 119         },
 120         [DMACH_PCM_OUT] = {
 121                 .name           = "pcm-out",
 122                 .channels       = MAP(S3C2443_DMAREQSEL_PCMOUT),
 123         },
 124         [DMACH_MIC_IN] = {
 125                 .name           = "mic-in",
 126                 .channels       = MAP(S3C2443_DMAREQSEL_MICIN),
 127         },
 128 };
 129
 130 static void s3c2443_dma_select(struct s3c2410_dma_chan *chan,
 131                                struct s3c24xx_dma_map *map)
 132 {
 133         writel(map->channels[0] | S3C2443_DMAREQSEL_HW,
 134                chan->regs + S3C2443_DMA_DMAREQSEL);
 135 }
 136
 137 static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = {
 138         .select         = s3c2443_dma_select,
 139         .dcon_mask      = 0,
 140         .map            = s3c2443_dma_mappings,
 141         .map_size       = ARRAY_SIZE(s3c2443_dma_mappings),
 142 };
 143
 144 static int __init s3c2443_dma_add(struct device *dev,
 145                                   struct subsys_interface *sif)
 146 {
 147         s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100);
 148         return s3c24xx_dma_init_map(&s3c2443_dma_sel);
 149 }
 150
 151 #ifdef CONFIG_CPU_S3C2416
 152 /* S3C2416 DMA contains the same selection table as the S3C2443 */
 153 static struct subsys_interface s3c2416_dma_interface = {
 154         .name           = "s3c2416_dma",
 155         .subsys         = &s3c2416_subsys,
 156         .add_dev        = s3c2443_dma_add,
 157 };
 158
 159 static int __init s3c2416_dma_init(void)
 160 {
 161         return subsys_interface_register(&s3c2416_dma_interface);
 162 }
 163
 164 arch_initcall(s3c2416_dma_init);
 165 #endif
 166
 167 #ifdef CONFIG_CPU_S3C2443
 168 static struct subsys_interface s3c2443_dma_interface = {
 169         .name           = "s3c2443_dma",
 170         .subsys         = &s3c2443_subsys,
 171         .add_dev        = s3c2443_dma_add,
 172 };
 173
 174 static int __init s3c2443_dma_init(void)
 175 {
 176         return subsys_interface_register(&s3c2443_dma_interface);
 177 }
 178
 179 arch_initcall(s3c2443_dma_init);
 180 #endif