1 /* Speyside modules for Cragganmore - board data probing
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/export.h>
12 #include <linux/interrupt.h>
13 #include <linux/i2c.h>
14 #include <linux/spi/spi.h>
16 #include <linux/mfd/wm831x/irq.h>
17 #include <linux/mfd/wm831x/gpio.h>
18 #include <linux/mfd/wm8994/pdata.h>
19 #include <linux/mfd/arizona/pdata.h>
21 #include <linux/regulator/machine.h>
23 #include <sound/wm0010.h>
24 #include <sound/wm2200.h>
25 #include <sound/wm5100.h>
26 #include <sound/wm8996.h>
27 #include <sound/wm8962.h>
28 #include <sound/wm9081.h>
30 #include <linux/platform_data/spi-s3c64xx.h>
35 static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
36 .line = S3C64XX_GPC(3),
39 static struct wm0010_pdata wm0010_pdata = {
40 .gpio_reset = S3C64XX_GPN(6),
41 .reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */
44 static struct spi_board_info wm1253_devs[] = {
47 .max_speed_hz = 26 * 1000 * 1000,
52 .controller_data = &wm0010_spi_csinfo,
53 .platform_data = &wm0010_pdata,
57 static struct spi_board_info balblair_devs[] = {
60 .max_speed_hz = 26 * 1000 * 1000,
65 .controller_data = &wm0010_spi_csinfo,
66 .platform_data = &wm0010_pdata,
70 static struct wm5100_pdata wm5100_pdata = {
71 .ldo_ena = S3C64XX_GPN(7),
72 .irq_flags = IRQF_TRIGGER_HIGH,
73 .gpio_base = CODEC_GPIO_BASE,
82 .hp_pol = CODEC_GPIO_BASE + 3,
84 { WM5100_MICDET_MICBIAS3, 0, 0 },
85 { WM5100_MICDET_MICBIAS2, 1, 1 },
93 0x2, /* IRQ: CMOS output */
94 0x3, /* CLKOUT: CMOS output */
98 static struct wm8996_retune_mobile_config wm8996_retune[] = {
103 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
104 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
105 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
112 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
113 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
114 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
119 static struct wm8996_pdata wm8996_pdata __initdata = {
120 .ldo_ena = S3C64XX_GPN(7),
121 .gpio_base = CODEC_GPIO_BASE,
123 .inl_mode = WM8996_DIFFERRENTIAL_1,
124 .inr_mode = WM8996_DIFFERRENTIAL_1,
126 .irq_flags = IRQF_TRIGGER_RISING,
129 0x8001, /* GPIO1 == ADCLRCLK1 */
130 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
131 0x0141, /* GPIO3 == HP_SEL */
132 0x0002, /* GPIO4 == IRQ */
133 0x020e, /* GPIO5 == CLKOUT */
136 .retune_mobile_cfgs = wm8996_retune,
137 .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
140 static struct wm8962_pdata wm8962_pdata __initdata = {
143 WM8962_GPIO_FN_OPCLK,
144 WM8962_GPIO_FN_DMICCLK,
146 0x8000 | WM8962_GPIO_FN_DMICDAT,
147 WM8962_GPIO_FN_IRQ, /* Open drain mode */
149 .in4_dc_measure = true,
152 static struct wm9081_pdata wm9081_pdata __initdata = {
157 static const struct i2c_board_info wm1254_devs[] = {
158 { I2C_BOARD_INFO("wm8996", 0x1a),
159 .platform_data = &wm8996_pdata,
160 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
162 { I2C_BOARD_INFO("wm9081", 0x6c),
163 .platform_data = &wm9081_pdata, },
166 static const struct i2c_board_info wm1255_devs[] = {
167 { I2C_BOARD_INFO("wm5100", 0x1a),
168 .platform_data = &wm5100_pdata,
169 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
171 { I2C_BOARD_INFO("wm9081", 0x6c),
172 .platform_data = &wm9081_pdata, },
175 static const struct i2c_board_info wm1259_devs[] = {
176 { I2C_BOARD_INFO("wm8962", 0x1a),
177 .platform_data = &wm8962_pdata,
178 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
182 static struct regulator_init_data wm8994_ldo1 = {
183 .supply_regulator = "WALLVDD",
186 static struct regulator_init_data wm8994_ldo2 = {
187 .supply_regulator = "WALLVDD",
190 static struct wm8994_pdata wm8994_pdata = {
191 .gpio_base = CODEC_GPIO_BASE,
194 0x3, /* IRQ out, active high, CMOS */
197 { .enable = S3C64XX_GPN(6), .init_data = &wm8994_ldo1, },
198 { .enable = S3C64XX_GPN(4), .init_data = &wm8994_ldo2, },
202 static const struct i2c_board_info wm1277_devs[] = {
203 { I2C_BOARD_INFO("wm8958", 0x1a), /* WM8958 is the superset */
204 .platform_data = &wm8994_pdata,
205 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
209 static struct arizona_pdata wm5102_reva_pdata = {
210 .ldoena = S3C64XX_GPN(7),
211 .gpio_base = CODEC_GPIO_BASE,
212 .irq_flags = IRQF_TRIGGER_HIGH,
213 .micd_pol_gpio = CODEC_GPIO_BASE + 4,
216 [2] = 0x10000, /* AIF3TXLRCLK */
217 [3] = 0x4, /* OPCLK */
221 static struct s3c64xx_spi_csinfo codec_spi_csinfo = {
222 .line = S3C64XX_GPN(5),
225 static struct spi_board_info wm5102_reva_spi_devs[] = {
227 .modalias = "wm5102",
228 .max_speed_hz = 10 * 1000 * 1000,
232 .irq = GLENFARCLAS_PMIC_IRQ_BASE +
234 .controller_data = &codec_spi_csinfo,
235 .platform_data = &wm5102_reva_pdata,
239 static struct arizona_pdata wm5102_pdata = {
240 .ldoena = S3C64XX_GPN(7),
241 .gpio_base = CODEC_GPIO_BASE,
242 .irq_flags = IRQF_TRIGGER_HIGH,
243 .micd_pol_gpio = CODEC_GPIO_BASE + 2,
245 [2] = 0x10000, /* AIF3TXLRCLK */
246 [3] = 0x4, /* OPCLK */
250 static struct spi_board_info wm5102_spi_devs[] = {
252 .modalias = "wm5102",
253 .max_speed_hz = 10 * 1000 * 1000,
257 .irq = GLENFARCLAS_PMIC_IRQ_BASE +
259 .controller_data = &codec_spi_csinfo,
260 .platform_data = &wm5102_pdata,
264 static struct spi_board_info wm5110_spi_devs[] = {
266 .modalias = "wm5110",
267 .max_speed_hz = 10 * 1000 * 1000,
271 .irq = GLENFARCLAS_PMIC_IRQ_BASE +
273 .controller_data = &codec_spi_csinfo,
274 .platform_data = &wm5102_reva_pdata,
278 static const struct i2c_board_info wm6230_i2c_devs[] = {
279 { I2C_BOARD_INFO("wm9081", 0x6c),
280 .platform_data = &wm9081_pdata, },
283 static struct wm2200_pdata wm2200_pdata = {
284 .ldo_ena = S3C64XX_GPN(7),
286 [2] = 0x0005, /* GPIO3 24.576MHz output clock */
290 static const struct i2c_board_info wm2200_i2c[] = {
291 { I2C_BOARD_INFO("wm2200", 0x3a),
292 .platform_data = &wm2200_pdata, },
295 static const struct {
299 const struct i2c_board_info *i2c_devs;
301 const struct spi_board_info *spi_devs;
304 { .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
305 { .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
306 { .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
307 { .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
308 { .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
309 .spi_devs = wm5110_spi_devs,
310 .num_spi_devs = ARRAY_SIZE(wm5110_spi_devs) },
311 { .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
312 { .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
313 { .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
314 { .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
315 { .id = 0x11, .rev = 0xff, .name = "6249-EV2 Glenfarclas", },
316 { .id = 0x14, .rev = 0xff, .name = "6271-EV1 Lochnagar" },
317 { .id = 0x15, .rev = 0xff, .name = "6320-EV1 Bells",
318 .i2c_devs = wm6230_i2c_devs,
319 .num_i2c_devs = ARRAY_SIZE(wm6230_i2c_devs) },
320 { .id = 0x21, .rev = 0xff, .name = "1275-EV1 Mortlach" },
321 { .id = 0x25, .rev = 0xff, .name = "1274-EV1 Glencadam" },
322 { .id = 0x31, .rev = 0xff, .name = "1253-EV1 Tomatin",
323 .spi_devs = wm1253_devs, .num_spi_devs = ARRAY_SIZE(wm1253_devs) },
324 { .id = 0x32, .rev = 0xff, .name = "XXXX-EV1 Caol Illa" },
325 { .id = 0x33, .rev = 0xff, .name = "XXXX-EV1 Oban" },
326 { .id = 0x34, .rev = 0xff, .name = "WM0010-6320-CS42 Balblair",
327 .spi_devs = balblair_devs,
328 .num_spi_devs = ARRAY_SIZE(balblair_devs) },
329 { .id = 0x39, .rev = 0xff, .name = "1254-EV1 Dallas Dhu",
330 .i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) },
331 { .id = 0x3a, .rev = 0xff, .name = "1259-EV1 Tobermory",
332 .i2c_devs = wm1259_devs, .num_i2c_devs = ARRAY_SIZE(wm1259_devs) },
333 { .id = 0x3b, .rev = 0xff, .name = "1255-EV1 Kilchoman",
334 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
335 { .id = 0x3c, .rev = 0xff, .name = "1273-EV1 Longmorn" },
336 { .id = 0x3d, .rev = 0xff, .name = "1277-EV1 Littlemill",
337 .i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
338 { .id = 0x3e, .rev = 0, .name = "WM5102-6271-EV1-CS127 Amrut",
339 .spi_devs = wm5102_reva_spi_devs,
340 .num_spi_devs = ARRAY_SIZE(wm5102_reva_spi_devs) },
341 { .id = 0x3e, .rev = -1, .name = "WM5102-6271-EV1-CS127 Amrut",
342 .spi_devs = wm5102_spi_devs,
343 .num_spi_devs = ARRAY_SIZE(wm5102_spi_devs) },
344 { .id = 0x3f, .rev = -1, .name = "WM2200-6271-CS90-M-REV1",
345 .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) },
348 static int wlf_gf_module_probe(struct i2c_client *i2c,
349 const struct i2c_device_id *i2c_id)
351 int ret, i, j, id, rev;
353 ret = i2c_smbus_read_byte_data(i2c, 0);
355 dev_err(&i2c->dev, "Failed to read ID: %d\n", ret);
359 id = (ret & 0xfe) >> 2;
361 for (i = 0; i < ARRAY_SIZE(gf_mods); i++)
362 if (id == gf_mods[i].id && (gf_mods[i].rev == 0xff ||
363 rev == gf_mods[i].rev))
366 if (i < ARRAY_SIZE(gf_mods)) {
367 dev_info(&i2c->dev, "%s revision %d\n",
368 gf_mods[i].name, rev + 1);
370 for (j = 0; j < gf_mods[i].num_i2c_devs; j++) {
371 if (!i2c_new_device(i2c->adapter,
372 &(gf_mods[i].i2c_devs[j])))
374 "Failed to register dev: %d\n", ret);
377 spi_register_board_info(gf_mods[i].spi_devs,
378 gf_mods[i].num_spi_devs);
380 dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
387 static const struct i2c_device_id wlf_gf_module_id[] = {
388 { "wlf-gf-module", 0 },
392 static struct i2c_driver wlf_gf_module_driver = {
394 .name = "wlf-gf-module",
395 .owner = THIS_MODULE,
397 .probe = wlf_gf_module_probe,
398 .id_table = wlf_gf_module_id,
401 static int __init wlf_gf_module_register(void)
403 if (!soc_is_s3c64xx())
406 return i2c_add_driver(&wlf_gf_module_driver);
408 device_initcall(wlf_gf_module_register);