arch/arm/mach-s3c64xx/mach-mini6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-mini6410.c
   2  *
   3  * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
   4  * Copyright 2008 Openmoko, Inc.
   5  * Copyright 2008 Simtec Electronics
   6  *      Ben Dooks <ben@simtec.co.uk>
   7  *      http://armlinux.simtec.co.uk/
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13 */
  14
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/fb.h>
  18 #include <linux/gpio.h>
  19 #include <linux/kernel.h>
  20 #include <linux/list.h>
  21 #include <linux/dm9000.h>
  22 #include <linux/mtd/mtd.h>
  23 #include <linux/mtd/partitions.h>
  24 #include <linux/serial_core.h>
  25 #include <linux/types.h>
  26
  27 #include <asm/hardware/vic.h>
  28 #include <asm/mach-types.h>
  29 #include <asm/mach/arch.h>
  30 #include <asm/mach/map.h>
  31
  32 #include <mach/map.h>
  33 #include <mach/regs-gpio.h>
  34 #include <mach/regs-modem.h>
  35 #include <mach/regs-srom.h>
  36
  37 #include <plat/s3c6410.h>
  38 #include <plat/adc.h>
  39 #include <plat/cpu.h>
  40 #include <plat/devs.h>
  41 #include <plat/fb.h>
  42 #include <plat/nand.h>
  43 #include <plat/regs-serial.h>
  44 #include <plat/ts.h>
  45 #include <plat/regs-fb-v4.h>
  46
  47 #include <video/platform_lcd.h>
  48
  49 #define UCON S3C2410_UCON_DEFAULT
  50 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  51 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  52
  53 static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = {
  54         [0] = {
  55                 .hwport = 0,
  56                 .flags  = 0,
  57                 .ucon   = UCON,
  58                 .ulcon  = ULCON,
  59                 .ufcon  = UFCON,
  60         },
  61         [1] = {
  62                 .hwport = 1,
  63                 .flags  = 0,
  64                 .ucon   = UCON,
  65                 .ulcon  = ULCON,
  66                 .ufcon  = UFCON,
  67         },
  68         [2] = {
  69                 .hwport = 2,
  70                 .flags  = 0,
  71                 .ucon   = UCON,
  72                 .ulcon  = ULCON,
  73                 .ufcon  = UFCON,
  74         },
  75         [3] = {
  76                 .hwport = 3,
  77                 .flags  = 0,
  78                 .ucon   = UCON,
  79                 .ulcon  = ULCON,
  80                 .ufcon  = UFCON,
  81         },
  82 };
  83
  84 /* DM9000AEP 10/100 ethernet controller */
  85
  86 static struct resource mini6410_dm9k_resource[] = {
  87         [0] = {
  88                 .start  = S3C64XX_PA_XM0CSN1,
  89                 .end    = S3C64XX_PA_XM0CSN1 + 1,
  90                 .flags  = IORESOURCE_MEM
  91         },
  92         [1] = {
  93                 .start  = S3C64XX_PA_XM0CSN1 + 4,
  94                 .end    = S3C64XX_PA_XM0CSN1 + 5,
  95                 .flags  = IORESOURCE_MEM
  96         },
  97         [2] = {
  98                 .start  = S3C_EINT(7),
  99                 .end    = S3C_EINT(7),
 100                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
 101         }
 102 };
 103
 104 static struct dm9000_plat_data mini6410_dm9k_pdata = {
 105         .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
 106 };
 107
 108 static struct platform_device mini6410_device_eth = {
 109         .name           = "dm9000",
 110         .id             = -1,
 111         .num_resources  = ARRAY_SIZE(mini6410_dm9k_resource),
 112         .resource       = mini6410_dm9k_resource,
 113         .dev            = {
 114                 .platform_data  = &mini6410_dm9k_pdata,
 115         },
 116 };
 117
 118 static struct mtd_partition mini6410_nand_part[] = {
 119         [0] = {
 120                 .name   = "uboot",
 121                 .size   = SZ_1M,
 122                 .offset = 0,
 123         },
 124         [1] = {
 125                 .name   = "kernel",
 126                 .size   = SZ_2M,
 127                 .offset = SZ_1M,
 128         },
 129         [2] = {
 130                 .name   = "rootfs",
 131                 .size   = MTDPART_SIZ_FULL,
 132                 .offset = SZ_1M + SZ_2M,
 133         },
 134 };
 135
 136 static struct s3c2410_nand_set mini6410_nand_sets[] = {
 137         [0] = {
 138                 .name           = "nand",
 139                 .nr_chips       = 1,
 140                 .nr_partitions  = ARRAY_SIZE(mini6410_nand_part),
 141                 .partitions     = mini6410_nand_part,
 142         },
 143 };
 144
 145 static struct s3c2410_platform_nand mini6410_nand_info = {
 146         .tacls          = 25,
 147         .twrph0         = 55,
 148         .twrph1         = 40,
 149         .nr_sets        = ARRAY_SIZE(mini6410_nand_sets),
 150         .sets           = mini6410_nand_sets,
 151 };
 152
 153 static struct s3c_fb_pd_win mini6410_fb_win[] = {
 154         {
 155                 .win_mode       = {     /* 4.3" 480x272 */
 156                         .left_margin    = 3,
 157                         .right_margin   = 2,
 158                         .upper_margin   = 1,
 159                         .lower_margin   = 1,
 160                         .hsync_len      = 40,
 161                         .vsync_len      = 1,
 162                         .xres           = 480,
 163                         .yres           = 272,
 164                 },
 165                 .max_bpp        = 32,
 166                 .default_bpp    = 16,
 167         }, {
 168                 .win_mode       = {     /* 7.0" 800x480 */
 169                         .left_margin    = 8,
 170                         .right_margin   = 13,
 171                         .upper_margin   = 7,
 172                         .lower_margin   = 5,
 173                         .hsync_len      = 3,
 174                         .vsync_len      = 1,
 175                         .xres           = 800,
 176                         .yres           = 480,
 177                 },
 178                 .max_bpp        = 32,
 179                 .default_bpp    = 16,
 180         },
 181 };
 182
 183 static struct s3c_fb_platdata mini6410_lcd_pdata __initdata = {
 184         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 185         .win[0]         = &mini6410_fb_win[0],
 186         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 187         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 188 };
 189
 190 static void mini6410_lcd_power_set(struct plat_lcd_data *pd,
 191                                    unsigned int power)
 192 {
 193         if (power)
 194                 gpio_direction_output(S3C64XX_GPE(0), 1);
 195         else
 196                 gpio_direction_output(S3C64XX_GPE(0), 0);
 197 }
 198
 199 static struct plat_lcd_data mini6410_lcd_power_data = {
 200         .set_power      = mini6410_lcd_power_set,
 201 };
 202
 203 static struct platform_device mini6410_lcd_powerdev = {
 204         .name                   = "platform-lcd",
 205         .dev.parent             = &s3c_device_fb.dev,
 206         .dev.platform_data      = &mini6410_lcd_power_data,
 207 };
 208
 209 static struct platform_device *mini6410_devices[] __initdata = {
 210         &mini6410_device_eth,
 211         &s3c_device_hsmmc0,
 212         &s3c_device_hsmmc1,
 213         &s3c_device_ohci,
 214         &s3c_device_nand,
 215         &s3c_device_fb,
 216         &mini6410_lcd_powerdev,
 217         &s3c_device_adc,
 218         &s3c_device_ts,
 219 };
 220
 221 static void __init mini6410_map_io(void)
 222 {
 223         u32 tmp;
 224
 225         s3c64xx_init_io(NULL, 0);
 226         s3c24xx_init_clocks(12000000);
 227         s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs));
 228
 229         /* set the LCD type */
 230         tmp = __raw_readl(S3C64XX_SPCON);
 231         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 232         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 233         __raw_writel(tmp, S3C64XX_SPCON);
 234
 235         /* remove the LCD bypass */
 236         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 237         tmp &= ~MIFPCON_LCD_BYPASS;
 238         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 239 }
 240
 241 /*
 242  * mini6410_features string
 243  *
 244  * 0-9 LCD configuration
 245  *
 246  */
 247 static char mini6410_features_str[12] __initdata = "0";
 248
 249 static int __init mini6410_features_setup(char *str)
 250 {
 251         if (str)
 252                 strlcpy(mini6410_features_str, str,
 253                         sizeof(mini6410_features_str));
 254         return 1;
 255 }
 256
 257 __setup("mini6410=", mini6410_features_setup);
 258
 259 #define FEATURE_SCREEN (1 << 0)
 260
 261 struct mini6410_features_t {
 262         int done;
 263         int lcd_index;
 264 };
 265
 266 static void mini6410_parse_features(
 267                 struct mini6410_features_t *features,
 268                 const char *features_str)
 269 {
 270         const char *fp = features_str;
 271
 272         features->done = 0;
 273         features->lcd_index = 0;
 274
 275         while (*fp) {
 276                 char f = *fp++;
 277
 278                 switch (f) {
 279                 case '0'...'9': /* tft screen */
 280                         if (features->done & FEATURE_SCREEN) {
 281                                 printk(KERN_INFO "MINI6410: '%c' ignored, "
 282                                         "screen type already set\n", f);
 283                         } else {
 284                                 int li = f - '0';
 285                                 if (li >= ARRAY_SIZE(mini6410_fb_win))
 286                                         printk(KERN_INFO "MINI6410: '%c' out "
 287                                                 "of range LCD mode\n", f);
 288                                 else {
 289                                         features->lcd_index = li;
 290                                 }
 291                         }
 292                         features->done |= FEATURE_SCREEN;
 293                         break;
 294                 }
 295         }
 296 }
 297
 298 static void __init mini6410_machine_init(void)
 299 {
 300         u32 cs1;
 301         struct mini6410_features_t features = { 0 };
 302
 303         printk(KERN_INFO "MINI6410: Option string mini6410=%s\n",
 304                         mini6410_features_str);
 305
 306         /* Parse the feature string */
 307         mini6410_parse_features(&features, mini6410_features_str);
 308
 309         mini6410_lcd_pdata.win[0] = &mini6410_fb_win[features.lcd_index];
 310
 311         printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
 312                 mini6410_lcd_pdata.win[0]->win_mode.xres,
 313                 mini6410_lcd_pdata.win[0]->win_mode.yres);
 314
 315         s3c_nand_set_platdata(&mini6410_nand_info);
 316         s3c_fb_set_platdata(&mini6410_lcd_pdata);
 317         s3c24xx_ts_set_platdata(NULL);
 318
 319         /* configure nCS1 width to 16 bits */
 320
 321         cs1 = __raw_readl(S3C64XX_SROM_BW) &
 322                 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 323         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 324                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 325                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 326                         S3C64XX_SROM_BW__NCS1__SHIFT;
 327         __raw_writel(cs1, S3C64XX_SROM_BW);
 328
 329         /* set timing for nCS1 suitable for ethernet chip */
 330
 331         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 332                 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 333                 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 334                 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 335                 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
 336                 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 337                 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 338
 339         gpio_request(S3C64XX_GPF(15), "LCD power");
 340         gpio_request(S3C64XX_GPE(0), "LCD power");
 341
 342         platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices));
 343 }
 344
 345 MACHINE_START(MINI6410, "MINI6410")
 346         /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
 347         .atag_offset    = 0x100,
 348         .init_irq       = s3c6410_init_irq,
 349         .handle_irq     = vic_handle_irq,
 350         .map_io         = mini6410_map_io,
 351         .init_machine   = mini6410_machine_init,
 352         .timer          = &s3c24xx_timer,
 353 MACHINE_END