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Merge branch 'depends/rmk/restart' into next/cleanup
[mv-sheeva.git] / arch / arm / mach-s3c64xx / mach-real6410.c
1 /* linux/arch/arm/mach-s3c64xx/mach-real6410.c
2  *
3  * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4  * Copyright 2008 Openmoko, Inc.
5  * Copyright 2008 Simtec Electronics
6  *      Ben Dooks <ben@simtec.co.uk>
7  *      http://armlinux.simtec.co.uk/
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13 */
14
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/fb.h>
18 #include <linux/gpio.h>
19 #include <linux/kernel.h>
20 #include <linux/list.h>
21 #include <linux/dm9000.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/platform_device.h>
25 #include <linux/serial_core.h>
26 #include <linux/types.h>
27
28 #include <asm/hardware/vic.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32
33 #include <mach/map.h>
34 #include <mach/regs-gpio.h>
35 #include <mach/regs-modem.h>
36 #include <mach/regs-srom.h>
37
38 #include <plat/adc.h>
39 #include <plat/cpu.h>
40 #include <plat/devs.h>
41 #include <plat/fb.h>
42 #include <plat/nand.h>
43 #include <plat/regs-serial.h>
44 #include <plat/ts.h>
45 #include <plat/regs-fb-v4.h>
46
47 #include <video/platform_lcd.h>
48
49 #include "common.h"
50
51 #define UCON S3C2410_UCON_DEFAULT
52 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
53 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
54
55 static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
56         [0] = {
57                 .hwport = 0,
58                 .flags  = 0,
59                 .ucon   = UCON,
60                 .ulcon  = ULCON,
61                 .ufcon  = UFCON,
62         },
63         [1] = {
64                 .hwport = 1,
65                 .flags  = 0,
66                 .ucon   = UCON,
67                 .ulcon  = ULCON,
68                 .ufcon  = UFCON,
69         },
70         [2] = {
71                 .hwport = 2,
72                 .flags  = 0,
73                 .ucon   = UCON,
74                 .ulcon  = ULCON,
75                 .ufcon  = UFCON,
76         },
77         [3] = {
78                 .hwport = 3,
79                 .flags  = 0,
80                 .ucon   = UCON,
81                 .ulcon  = ULCON,
82                 .ufcon  = UFCON,
83         },
84 };
85
86 /* DM9000AEP 10/100 ethernet controller */
87
88 static struct resource real6410_dm9k_resource[] = {
89         [0] = {
90                 .start  = S3C64XX_PA_XM0CSN1,
91                 .end    = S3C64XX_PA_XM0CSN1 + 1,
92                 .flags  = IORESOURCE_MEM
93         },
94         [1] = {
95                 .start  = S3C64XX_PA_XM0CSN1 + 4,
96                 .end    = S3C64XX_PA_XM0CSN1 + 5,
97                 .flags  = IORESOURCE_MEM
98         },
99         [2] = {
100                 .start  = S3C_EINT(7),
101                 .end    = S3C_EINT(7),
102                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
103         }
104 };
105
106 static struct dm9000_plat_data real6410_dm9k_pdata = {
107         .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
108 };
109
110 static struct platform_device real6410_device_eth = {
111         .name           = "dm9000",
112         .id             = -1,
113         .num_resources  = ARRAY_SIZE(real6410_dm9k_resource),
114         .resource       = real6410_dm9k_resource,
115         .dev            = {
116                 .platform_data  = &real6410_dm9k_pdata,
117         },
118 };
119
120 static struct s3c_fb_pd_win real6410_fb_win[] = {
121         {
122                 .win_mode       = {     /* 4.3" 480x272 */
123                         .left_margin    = 3,
124                         .right_margin   = 2,
125                         .upper_margin   = 1,
126                         .lower_margin   = 1,
127                         .hsync_len      = 40,
128                         .vsync_len      = 1,
129                         .xres           = 480,
130                         .yres           = 272,
131                 },
132                 .max_bpp        = 32,
133                 .default_bpp    = 16,
134         }, {
135                 .win_mode       = {     /* 7.0" 800x480 */
136                         .left_margin    = 8,
137                         .right_margin   = 13,
138                         .upper_margin   = 7,
139                         .lower_margin   = 5,
140                         .hsync_len      = 3,
141                         .vsync_len      = 1,
142                         .xres           = 800,
143                         .yres           = 480,
144                 },
145                 .max_bpp        = 32,
146                 .default_bpp    = 16,
147         },
148 };
149
150 static struct s3c_fb_platdata real6410_lcd_pdata __initdata = {
151         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
152         .win[0]         = &real6410_fb_win[0],
153         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
154         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
155 };
156
157 static struct mtd_partition real6410_nand_part[] = {
158         [0] = {
159                 .name   = "uboot",
160                 .size   = SZ_1M,
161                 .offset = 0,
162         },
163         [1] = {
164                 .name   = "kernel",
165                 .size   = SZ_2M,
166                 .offset = SZ_1M,
167         },
168         [2] = {
169                 .name   = "rootfs",
170                 .size   = MTDPART_SIZ_FULL,
171                 .offset = SZ_1M + SZ_2M,
172         },
173 };
174
175 static struct s3c2410_nand_set real6410_nand_sets[] = {
176         [0] = {
177                 .name           = "nand",
178                 .nr_chips       = 1,
179                 .nr_partitions  = ARRAY_SIZE(real6410_nand_part),
180                 .partitions     = real6410_nand_part,
181         },
182 };
183
184 static struct s3c2410_platform_nand real6410_nand_info = {
185         .tacls          = 25,
186         .twrph0         = 55,
187         .twrph1         = 40,
188         .nr_sets        = ARRAY_SIZE(real6410_nand_sets),
189         .sets           = real6410_nand_sets,
190 };
191
192 static struct platform_device *real6410_devices[] __initdata = {
193         &real6410_device_eth,
194         &s3c_device_hsmmc0,
195         &s3c_device_hsmmc1,
196         &s3c_device_fb,
197         &s3c_device_nand,
198         &s3c_device_adc,
199         &s3c_device_ts,
200         &s3c_device_ohci,
201 };
202
203 static void __init real6410_map_io(void)
204 {
205         u32 tmp;
206
207         s3c64xx_init_io(NULL, 0);
208         s3c24xx_init_clocks(12000000);
209         s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
210
211         /* set the LCD type */
212         tmp = __raw_readl(S3C64XX_SPCON);
213         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
214         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
215         __raw_writel(tmp, S3C64XX_SPCON);
216
217         /* remove the LCD bypass */
218         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
219         tmp &= ~MIFPCON_LCD_BYPASS;
220         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
221 }
222
223 /*
224  * real6410_features string
225  *
226  * 0-9 LCD configuration
227  *
228  */
229 static char real6410_features_str[12] __initdata = "0";
230
231 static int __init real6410_features_setup(char *str)
232 {
233         if (str)
234                 strlcpy(real6410_features_str, str,
235                         sizeof(real6410_features_str));
236         return 1;
237 }
238
239 __setup("real6410=", real6410_features_setup);
240
241 #define FEATURE_SCREEN (1 << 0)
242
243 struct real6410_features_t {
244         int done;
245         int lcd_index;
246 };
247
248 static void real6410_parse_features(
249                 struct real6410_features_t *features,
250                 const char *features_str)
251 {
252         const char *fp = features_str;
253
254         features->done = 0;
255         features->lcd_index = 0;
256
257         while (*fp) {
258                 char f = *fp++;
259
260                 switch (f) {
261                 case '0'...'9': /* tft screen */
262                         if (features->done & FEATURE_SCREEN) {
263                                 printk(KERN_INFO "REAL6410: '%c' ignored, "
264                                         "screen type already set\n", f);
265                         } else {
266                                 int li = f - '0';
267                                 if (li >= ARRAY_SIZE(real6410_fb_win))
268                                         printk(KERN_INFO "REAL6410: '%c' out "
269                                                 "of range LCD mode\n", f);
270                                 else {
271                                         features->lcd_index = li;
272                                 }
273                         }
274                         features->done |= FEATURE_SCREEN;
275                         break;
276                 }
277         }
278 }
279
280 static void __init real6410_machine_init(void)
281 {
282         u32 cs1;
283         struct real6410_features_t features = { 0 };
284
285         printk(KERN_INFO "REAL6410: Option string real6410=%s\n",
286                         real6410_features_str);
287
288         /* Parse the feature string */
289         real6410_parse_features(&features, real6410_features_str);
290
291         real6410_lcd_pdata.win[0] = &real6410_fb_win[features.lcd_index];
292
293         printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",
294                 real6410_lcd_pdata.win[0]->win_mode.xres,
295                 real6410_lcd_pdata.win[0]->win_mode.yres);
296
297         s3c_fb_set_platdata(&real6410_lcd_pdata);
298         s3c_nand_set_platdata(&real6410_nand_info);
299         s3c24xx_ts_set_platdata(NULL);
300
301         /* configure nCS1 width to 16 bits */
302
303         cs1 = __raw_readl(S3C64XX_SROM_BW) &
304                 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
305         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
306                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
307                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
308                         S3C64XX_SROM_BW__NCS1__SHIFT;
309         __raw_writel(cs1, S3C64XX_SROM_BW);
310
311         /* set timing for nCS1 suitable for ethernet chip */
312
313         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
314                 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
315                 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
316                 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
317                 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
318                 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
319                 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
320
321         gpio_request(S3C64XX_GPF(15), "LCD power");
322
323         platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
324 }
325
326 MACHINE_START(REAL6410, "REAL6410")
327         /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
328         .atag_offset    = 0x100,
329
330         .init_irq       = s3c6410_init_irq,
331         .handle_irq     = vic_handle_irq,
332         .map_io         = real6410_map_io,
333         .init_machine   = real6410_machine_init,
334         .timer          = &s3c24xx_timer,
335         .restart        = s3c64xx_restart,
336 MACHINE_END