arch/arm/mach-s3c64xx/mach-smdk6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12 */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/types.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/list.h>
  18 #include <linux/timer.h>
  19 #include <linux/init.h>
  20 #include <linux/input.h>
  21 #include <linux/serial_core.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/io.h>
  24 #include <linux/i2c.h>
  25 #include <linux/leds.h>
  26 #include <linux/fb.h>
  27 #include <linux/gpio.h>
  28 #include <linux/delay.h>
  29 #include <linux/smsc911x.h>
  30 #include <linux/regulator/fixed.h>
  31 #include <linux/regulator/machine.h>
  32 #include <linux/pwm_backlight.h>
  33 #include <linux/platform_data/s3c-hsotg.h>
  34
  35 #ifdef CONFIG_SMDK6410_WM1190_EV1
  36 #include <linux/mfd/wm8350/core.h>
  37 #include <linux/mfd/wm8350/pmic.h>
  38 #endif
  39
  40 #ifdef CONFIG_SMDK6410_WM1192_EV1
  41 #include <linux/mfd/wm831x/core.h>
  42 #include <linux/mfd/wm831x/pdata.h>
  43 #endif
  44
  45 #include <video/platform_lcd.h>
  46
  47 #include <asm/hardware/vic.h>
  48 #include <asm/mach/arch.h>
  49 #include <asm/mach/map.h>
  50 #include <asm/mach/irq.h>
  51
  52 #include <mach/hardware.h>
  53 #include <mach/map.h>
  54
  55 #include <asm/irq.h>
  56 #include <asm/mach-types.h>
  57
  58 #include <plat/regs-serial.h>
  59 #include <mach/regs-modem.h>
  60 #include <mach/regs-gpio.h>
  61 #include <mach/regs-sys.h>
  62 #include <mach/regs-srom.h>
  63 #include <plat/ata.h>
  64 #include <plat/iic.h>
  65 #include <plat/fb.h>
  66 #include <plat/gpio-cfg.h>
  67
  68 #include <plat/clock.h>
  69 #include <plat/devs.h>
  70 #include <plat/cpu.h>
  71 #include <plat/adc.h>
  72 #include <plat/ts.h>
  73 #include <plat/keypad.h>
  74 #include <plat/backlight.h>
  75 #include <plat/regs-fb-v4.h>
  76
  77 #include "common.h"
  78
  79 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  80 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  81 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  82
  83 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  84         [0] = {
  85                 .hwport      = 0,
  86                 .flags       = 0,
  87                 .ucon        = UCON,
  88                 .ulcon       = ULCON,
  89                 .ufcon       = UFCON,
  90         },
  91         [1] = {
  92                 .hwport      = 1,
  93                 .flags       = 0,
  94                 .ucon        = UCON,
  95                 .ulcon       = ULCON,
  96                 .ufcon       = UFCON,
  97         },
  98         [2] = {
  99                 .hwport      = 2,
 100                 .flags       = 0,
 101                 .ucon        = UCON,
 102                 .ulcon       = ULCON,
 103                 .ufcon       = UFCON,
 104         },
 105         [3] = {
 106                 .hwport      = 3,
 107                 .flags       = 0,
 108                 .ucon        = UCON,
 109                 .ulcon       = ULCON,
 110                 .ufcon       = UFCON,
 111         },
 112 };
 113
 114 /* framebuffer and LCD setup. */
 115
 116 /* GPF15 = LCD backlight control
 117  * GPF13 => Panel power
 118  * GPN5 = LCD nRESET signal
 119  * PWM_TOUT1 => backlight brightness
 120  */
 121
 122 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
 123                                    unsigned int power)
 124 {
 125         if (power) {
 126                 gpio_direction_output(S3C64XX_GPF(13), 1);
 127
 128                 /* fire nRESET on power up */
 129                 gpio_direction_output(S3C64XX_GPN(5), 0);
 130                 msleep(10);
 131                 gpio_direction_output(S3C64XX_GPN(5), 1);
 132                 msleep(1);
 133         } else {
 134                 gpio_direction_output(S3C64XX_GPF(13), 0);
 135         }
 136 }
 137
 138 static struct plat_lcd_data smdk6410_lcd_power_data = {
 139         .set_power      = smdk6410_lcd_power_set,
 140 };
 141
 142 static struct platform_device smdk6410_lcd_powerdev = {
 143         .name                   = "platform-lcd",
 144         .dev.parent             = &s3c_device_fb.dev,
 145         .dev.platform_data      = &smdk6410_lcd_power_data,
 146 };
 147
 148 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
 149         /* this is to ensure we use win0 */
 150         .win_mode       = {
 151                 .left_margin    = 8,
 152                 .right_margin   = 13,
 153                 .upper_margin   = 7,
 154                 .lower_margin   = 5,
 155                 .hsync_len      = 3,
 156                 .vsync_len      = 1,
 157                 .xres           = 800,
 158                 .yres           = 480,
 159         },
 160         .max_bpp        = 32,
 161         .default_bpp    = 16,
 162         .virtual_y      = 480 * 2,
 163         .virtual_x      = 800,
 164 };
 165
 166 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
 167 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
 168         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 169         .win[0]         = &smdk6410_fb_win0,
 170         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 171         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 172 };
 173
 174 /*
 175  * Configuring Ethernet on SMDK6410
 176  *
 177  * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
 178  * The constant address below corresponds to nCS1
 179  *
 180  *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
 181  *  2) CFG6 needs to be switched to "LAN9115" side
 182  */
 183
 184 static struct resource smdk6410_smsc911x_resources[] = {
 185         [0] = {
 186                 .start = S3C64XX_PA_XM0CSN1,
 187                 .end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
 188                 .flags = IORESOURCE_MEM,
 189         },
 190         [1] = {
 191                 .start = S3C_EINT(10),
 192                 .end   = S3C_EINT(10),
 193                 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
 194         },
 195 };
 196
 197 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
 198         .irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 199         .irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 200         .flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
 201         .phy_interface = PHY_INTERFACE_MODE_MII,
 202 };
 203
 204
 205 static struct platform_device smdk6410_smsc911x = {
 206         .name          = "smsc911x",
 207         .id            = -1,
 208         .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
 209         .resource      = &smdk6410_smsc911x_resources[0],
 210         .dev = {
 211                 .platform_data = &smdk6410_smsc911x_pdata,
 212         },
 213 };
 214
 215 #ifdef CONFIG_REGULATOR
 216 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
 217         REGULATOR_SUPPLY("PVDD", "0-001b"),
 218         REGULATOR_SUPPLY("AVDD", "0-001b"),
 219 };
 220
 221 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
 222         .constraints = {
 223                 .always_on = 1,
 224         },
 225         .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
 226         .consumer_supplies = smdk6410_b_pwr_5v_consumers,
 227 };
 228
 229 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
 230         .supply_name = "B_PWR_5V",
 231         .microvolts = 5000000,
 232         .init_data = &smdk6410_b_pwr_5v_data,
 233         .gpio = -EINVAL,
 234 };
 235
 236 static struct platform_device smdk6410_b_pwr_5v = {
 237         .name          = "reg-fixed-voltage",
 238         .id            = -1,
 239         .dev = {
 240                 .platform_data = &smdk6410_b_pwr_5v_pdata,
 241         },
 242 };
 243 #endif
 244
 245 static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
 246         .setup_gpio     = s3c64xx_ide_setup_gpio,
 247 };
 248
 249 static uint32_t smdk6410_keymap[] __initdata = {
 250         /* KEY(row, col, keycode) */
 251         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 252         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 253         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 254         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 255 };
 256
 257 static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
 258         .keymap         = smdk6410_keymap,
 259         .keymap_size    = ARRAY_SIZE(smdk6410_keymap),
 260 };
 261
 262 static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
 263         .keymap_data    = &smdk6410_keymap_data,
 264         .rows           = 2,
 265         .cols           = 8,
 266 };
 267
 268 static struct map_desc smdk6410_iodesc[] = {};
 269
 270 static struct platform_device *smdk6410_devices[] __initdata = {
 271 #ifdef CONFIG_SMDK6410_SD_CH0
 272         &s3c_device_hsmmc0,
 273 #endif
 274 #ifdef CONFIG_SMDK6410_SD_CH1
 275         &s3c_device_hsmmc1,
 276 #endif
 277         &s3c_device_i2c0,
 278         &s3c_device_i2c1,
 279         &s3c_device_fb,
 280         &s3c_device_ohci,
 281         &s3c_device_usb_hsotg,
 282         &samsung_asoc_dma,
 283         &s3c64xx_device_iisv4,
 284         &samsung_device_keypad,
 285
 286 #ifdef CONFIG_REGULATOR
 287         &smdk6410_b_pwr_5v,
 288 #endif
 289         &smdk6410_lcd_powerdev,
 290
 291         &smdk6410_smsc911x,
 292         &s3c_device_adc,
 293         &s3c_device_cfcon,
 294         &s3c_device_rtc,
 295         &s3c_device_ts,
 296         &s3c_device_wdt,
 297 };
 298
 299 #ifdef CONFIG_REGULATOR
 300 /* ARM core */
 301 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
 302         REGULATOR_SUPPLY("vddarm", NULL),
 303 };
 304
 305 /* VDDARM, BUCK1 on J5 */
 306 static struct regulator_init_data smdk6410_vddarm = {
 307         .constraints = {
 308                 .name = "PVDD_ARM",
 309                 .min_uV = 1000000,
 310                 .max_uV = 1300000,
 311                 .always_on = 1,
 312                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 313         },
 314         .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
 315         .consumer_supplies = smdk6410_vddarm_consumers,
 316 };
 317
 318 /* VDD_INT, BUCK2 on J5 */
 319 static struct regulator_init_data smdk6410_vddint = {
 320         .constraints = {
 321                 .name = "PVDD_INT",
 322                 .min_uV = 1000000,
 323                 .max_uV = 1200000,
 324                 .always_on = 1,
 325                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 326         },
 327 };
 328
 329 /* VDD_HI, LDO3 on J5 */
 330 static struct regulator_init_data smdk6410_vddhi = {
 331         .constraints = {
 332                 .name = "PVDD_HI",
 333                 .always_on = 1,
 334         },
 335 };
 336
 337 /* VDD_PLL, LDO2 on J5 */
 338 static struct regulator_init_data smdk6410_vddpll = {
 339         .constraints = {
 340                 .name = "PVDD_PLL",
 341                 .always_on = 1,
 342         },
 343 };
 344
 345 /* VDD_UH_MMC, LDO5 on J5 */
 346 static struct regulator_init_data smdk6410_vdduh_mmc = {
 347         .constraints = {
 348                 .name = "PVDD_UH+PVDD_MMC",
 349                 .always_on = 1,
 350         },
 351 };
 352
 353 /* VCCM3BT, LDO8 on J5 */
 354 static struct regulator_init_data smdk6410_vccmc3bt = {
 355         .constraints = {
 356                 .name = "PVCCM3BT",
 357                 .always_on = 1,
 358         },
 359 };
 360
 361 /* VCCM2MTV, LDO11 on J5 */
 362 static struct regulator_init_data smdk6410_vccm2mtv = {
 363         .constraints = {
 364                 .name = "PVCCM2MTV",
 365                 .always_on = 1,
 366         },
 367 };
 368
 369 /* VDD_LCD, LDO12 on J5 */
 370 static struct regulator_init_data smdk6410_vddlcd = {
 371         .constraints = {
 372                 .name = "PVDD_LCD",
 373                 .always_on = 1,
 374         },
 375 };
 376
 377 /* VDD_OTGI, LDO9 on J5 */
 378 static struct regulator_init_data smdk6410_vddotgi = {
 379         .constraints = {
 380                 .name = "PVDD_OTGI",
 381                 .always_on = 1,
 382         },
 383 };
 384
 385 /* VDD_OTG, LDO14 on J5 */
 386 static struct regulator_init_data smdk6410_vddotg = {
 387         .constraints = {
 388                 .name = "PVDD_OTG",
 389                 .always_on = 1,
 390         },
 391 };
 392
 393 /* VDD_ALIVE, LDO15 on J5 */
 394 static struct regulator_init_data smdk6410_vddalive = {
 395         .constraints = {
 396                 .name = "PVDD_ALIVE",
 397                 .always_on = 1,
 398         },
 399 };
 400
 401 /* VDD_AUDIO, VLDO_AUDIO on J5 */
 402 static struct regulator_init_data smdk6410_vddaudio = {
 403         .constraints = {
 404                 .name = "PVDD_AUDIO",
 405                 .always_on = 1,
 406         },
 407 };
 408 #endif
 409
 410 #ifdef CONFIG_SMDK6410_WM1190_EV1
 411 /* S3C64xx internal logic & PLL */
 412 static struct regulator_init_data wm8350_dcdc1_data = {
 413         .constraints = {
 414                 .name = "PVDD_INT+PVDD_PLL",
 415                 .min_uV = 1200000,
 416                 .max_uV = 1200000,
 417                 .always_on = 1,
 418                 .apply_uV = 1,
 419         },
 420 };
 421
 422 /* Memory */
 423 static struct regulator_init_data wm8350_dcdc3_data = {
 424         .constraints = {
 425                 .name = "PVDD_MEM",
 426                 .min_uV = 1800000,
 427                 .max_uV = 1800000,
 428                 .always_on = 1,
 429                 .state_mem = {
 430                          .uV = 1800000,
 431                          .mode = REGULATOR_MODE_NORMAL,
 432                          .enabled = 1,
 433                 },
 434                 .initial_state = PM_SUSPEND_MEM,
 435         },
 436 };
 437
 438 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
 439 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
 440         REGULATOR_SUPPLY("DVDD", "0-001b"),
 441 };
 442
 443 static struct regulator_init_data wm8350_dcdc4_data = {
 444         .constraints = {
 445                 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
 446                 .min_uV = 3000000,
 447                 .max_uV = 3000000,
 448                 .always_on = 1,
 449         },
 450         .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
 451         .consumer_supplies = wm8350_dcdc4_consumers,
 452 };
 453
 454 /* OTGi/1190-EV1 HPVDD & AVDD */
 455 static struct regulator_init_data wm8350_ldo4_data = {
 456         .constraints = {
 457                 .name = "PVDD_OTGI+HPVDD+AVDD",
 458                 .min_uV = 1200000,
 459                 .max_uV = 1200000,
 460                 .apply_uV = 1,
 461                 .always_on = 1,
 462         },
 463 };
 464
 465 static struct {
 466         int regulator;
 467         struct regulator_init_data *initdata;
 468 } wm1190_regulators[] = {
 469         { WM8350_DCDC_1, &wm8350_dcdc1_data },
 470         { WM8350_DCDC_3, &wm8350_dcdc3_data },
 471         { WM8350_DCDC_4, &wm8350_dcdc4_data },
 472         { WM8350_DCDC_6, &smdk6410_vddarm },
 473         { WM8350_LDO_1, &smdk6410_vddalive },
 474         { WM8350_LDO_2, &smdk6410_vddotg },
 475         { WM8350_LDO_3, &smdk6410_vddlcd },
 476         { WM8350_LDO_4, &wm8350_ldo4_data },
 477 };
 478
 479 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
 480 {
 481         int i;
 482
 483         /* Configure the IRQ line */
 484         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 485
 486         /* Instantiate the regulators */
 487         for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
 488                 wm8350_register_regulator(wm8350,
 489                                           wm1190_regulators[i].regulator,
 490                                           wm1190_regulators[i].initdata);
 491
 492         return 0;
 493 }
 494
 495 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
 496         .init = smdk6410_wm8350_init,
 497         .irq_high = 1,
 498         .irq_base = IRQ_BOARD_START,
 499 };
 500 #endif
 501
 502 #ifdef CONFIG_SMDK6410_WM1192_EV1
 503 static struct gpio_led wm1192_pmic_leds[] = {
 504         {
 505                 .name = "PMIC:red:power",
 506                 .gpio = GPIO_BOARD_START + 3,
 507                 .default_state = LEDS_GPIO_DEFSTATE_ON,
 508         },
 509 };
 510
 511 static struct gpio_led_platform_data wm1192_pmic_led = {
 512         .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
 513         .leds = wm1192_pmic_leds,
 514 };
 515
 516 static struct platform_device wm1192_pmic_led_dev = {
 517         .name          = "leds-gpio",
 518         .id            = -1,
 519         .dev = {
 520                 .platform_data = &wm1192_pmic_led,
 521         },
 522 };
 523
 524 static int wm1192_pre_init(struct wm831x *wm831x)
 525 {
 526         int ret;
 527
 528         /* Configure the IRQ line */
 529         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 530
 531         ret = platform_device_register(&wm1192_pmic_led_dev);
 532         if (ret != 0)
 533                 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
 534
 535         return 0;
 536 }
 537
 538 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
 539         .isink = 1,
 540         .max_uA = 27554,
 541 };
 542
 543 static struct regulator_init_data wm1192_dcdc3 = {
 544         .constraints = {
 545                 .name = "PVDD_MEM+PVDD_GPS",
 546                 .always_on = 1,
 547         },
 548 };
 549
 550 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
 551         REGULATOR_SUPPLY("DVDD", "0-001b"),   /* WM8580 */
 552 };
 553
 554 static struct regulator_init_data wm1192_ldo1 = {
 555         .constraints = {
 556                 .name = "PVDD_LCD+PVDD_EXT",
 557                 .always_on = 1,
 558         },
 559         .consumer_supplies = wm1192_ldo1_consumers,
 560         .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
 561 };
 562
 563 static struct wm831x_status_pdata wm1192_led7_pdata = {
 564         .name = "LED7:green:",
 565 };
 566
 567 static struct wm831x_status_pdata wm1192_led8_pdata = {
 568         .name = "LED8:green:",
 569 };
 570
 571 static struct wm831x_pdata smdk6410_wm1192_pdata = {
 572         .pre_init = wm1192_pre_init,
 573         .irq_base = IRQ_BOARD_START,
 574
 575         .backlight = &wm1192_backlight_pdata,
 576         .dcdc = {
 577                 &smdk6410_vddarm,  /* DCDC1 */
 578                 &smdk6410_vddint,  /* DCDC2 */
 579                 &wm1192_dcdc3,
 580         },
 581         .gpio_base = GPIO_BOARD_START,
 582         .ldo = {
 583                  &wm1192_ldo1,        /* LDO1 */
 584                  &smdk6410_vdduh_mmc, /* LDO2 */
 585                  NULL,                /* LDO3 NC */
 586                  &smdk6410_vddotgi,   /* LDO4 */
 587                  &smdk6410_vddotg,    /* LDO5 */
 588                  &smdk6410_vddhi,     /* LDO6 */
 589                  &smdk6410_vddaudio,  /* LDO7 */
 590                  &smdk6410_vccm2mtv,  /* LDO8 */
 591                  &smdk6410_vddpll,    /* LDO9 */
 592                  &smdk6410_vccmc3bt,  /* LDO10 */
 593                  &smdk6410_vddalive,  /* LDO11 */
 594         },
 595         .status = {
 596                 &wm1192_led7_pdata,
 597                 &wm1192_led8_pdata,
 598         },
 599 };
 600 #endif
 601
 602 static struct i2c_board_info i2c_devs0[] __initdata = {
 603         { I2C_BOARD_INFO("24c08", 0x50), },
 604         { I2C_BOARD_INFO("wm8580", 0x1b), },
 605
 606 #ifdef CONFIG_SMDK6410_WM1192_EV1
 607         { I2C_BOARD_INFO("wm8312", 0x34),
 608           .platform_data = &smdk6410_wm1192_pdata,
 609           .irq = S3C_EINT(12),
 610         },
 611 #endif
 612
 613 #ifdef CONFIG_SMDK6410_WM1190_EV1
 614         { I2C_BOARD_INFO("wm8350", 0x1a),
 615           .platform_data = &smdk6410_wm8350_pdata,
 616           .irq = S3C_EINT(12),
 617         },
 618 #endif
 619 };
 620
 621 static struct i2c_board_info i2c_devs1[] __initdata = {
 622         { I2C_BOARD_INFO("24c128", 0x57), },    /* Samsung S524AD0XD1 */
 623 };
 624
 625 /* LCD Backlight data */
 626 static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
 627         .no = S3C64XX_GPF(15),
 628         .func = S3C_GPIO_SFN(2),
 629 };
 630
 631 static struct platform_pwm_backlight_data smdk6410_bl_data = {
 632         .pwm_id = 1,
 633 };
 634
 635 static struct s3c_hsotg_plat smdk6410_hsotg_pdata;
 636
 637 static void __init smdk6410_map_io(void)
 638 {
 639         u32 tmp;
 640
 641         s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
 642         s3c24xx_init_clocks(12000000);
 643         s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
 644
 645         /* set the LCD type */
 646
 647         tmp = __raw_readl(S3C64XX_SPCON);
 648         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 649         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 650         __raw_writel(tmp, S3C64XX_SPCON);
 651
 652         /* remove the lcd bypass */
 653         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 654         tmp &= ~MIFPCON_LCD_BYPASS;
 655         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 656 }
 657
 658 static void __init smdk6410_machine_init(void)
 659 {
 660         u32 cs1;
 661
 662         s3c_i2c0_set_platdata(NULL);
 663         s3c_i2c1_set_platdata(NULL);
 664         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 665         s3c_hsotg_set_platdata(&smdk6410_hsotg_pdata);
 666
 667         samsung_keypad_set_platdata(&smdk6410_keypad_data);
 668
 669         s3c24xx_ts_set_platdata(NULL);
 670
 671         /* configure nCS1 width to 16 bits */
 672
 673         cs1 = __raw_readl(S3C64XX_SROM_BW) &
 674                     ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 675         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 676                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 677                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 678                                                    S3C64XX_SROM_BW__NCS1__SHIFT;
 679         __raw_writel(cs1, S3C64XX_SROM_BW);
 680
 681         /* set timing for nCS1 suitable for ethernet chip */
 682
 683         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 684                      (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 685                      (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 686                      (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 687                      (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
 688                      (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 689                      (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 690
 691         gpio_request(S3C64XX_GPN(5), "LCD power");
 692         gpio_request(S3C64XX_GPF(13), "LCD power");
 693
 694         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
 695         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 696
 697         s3c_ide_set_platdata(&smdk6410_ide_pdata);
 698
 699         samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
 700
 701         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
 702 }
 703
 704 MACHINE_START(SMDK6410, "SMDK6410")
 705         /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
 706         .atag_offset    = 0x100,
 707
 708         .init_irq       = s3c6410_init_irq,
 709         .handle_irq     = vic_handle_irq,
 710         .map_io         = smdk6410_map_io,
 711         .init_machine   = smdk6410_machine_init,
 712         .timer          = &s3c24xx_timer,
 713         .restart        = s3c64xx_restart,
 714 MACHINE_END