1 /* linux/arch/arm/mach-s5p64x0/dev-spi.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7 * Jaswinder Singh <jassi.brar@samsung.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/platform_device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
20 #include <mach/irqs.h>
21 #include <mach/regs-clock.h>
22 #include <mach/spi-clocks.h>
24 #include <plat/s3c64xx-spi.h>
25 #include <plat/gpio-cfg.h>
27 static char *s5p64x0_spi_src_clks[] = {
28 [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
29 [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
32 /* SPI Controller platform_devices */
34 /* Since we emulate multi-cs capability, we do not touch the CS.
35 * The emulated CS is toggled by board specific mechanism, as it can
36 * be either some immediate GPIO or some signal out of some other
37 * chip in between ... or some yet another way.
38 * We simply do not assume anything about CS.
40 static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
46 base = S5P6440_GPC(0);
50 base = S5P6440_GPC(4);
54 dev_err(&pdev->dev, "Invalid SPI Controller number!");
58 s3c_gpio_cfgall_range(base, 3,
59 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
64 static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
70 base = S5P6450_GPC(0);
74 base = S5P6450_GPC(4);
78 dev_err(&pdev->dev, "Invalid SPI Controller number!");
82 s3c_gpio_cfgall_range(base, 3,
83 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
88 static struct resource s5p64x0_spi0_resource[] = {
90 .start = S5P64X0_PA_SPI0,
91 .end = S5P64X0_PA_SPI0 + 0x100 - 1,
92 .flags = IORESOURCE_MEM,
95 .start = DMACH_SPI0_TX,
97 .flags = IORESOURCE_DMA,
100 .start = DMACH_SPI0_RX,
101 .end = DMACH_SPI0_RX,
102 .flags = IORESOURCE_DMA,
107 .flags = IORESOURCE_IRQ,
111 static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
112 .cfg_gpio = s5p6440_spi_cfg_gpio,
113 .fifo_lvl_mask = 0x1ff,
117 static struct s3c64xx_spi_info s5p6450_spi0_pdata = {
118 .cfg_gpio = s5p6450_spi_cfg_gpio,
119 .fifo_lvl_mask = 0x1ff,
123 static u64 spi_dmamask = DMA_BIT_MASK(32);
125 struct platform_device s5p64x0_device_spi0 = {
126 .name = "s3c64xx-spi",
128 .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
129 .resource = s5p64x0_spi0_resource,
131 .dma_mask = &spi_dmamask,
132 .coherent_dma_mask = DMA_BIT_MASK(32),
136 static struct resource s5p64x0_spi1_resource[] = {
138 .start = S5P64X0_PA_SPI1,
139 .end = S5P64X0_PA_SPI1 + 0x100 - 1,
140 .flags = IORESOURCE_MEM,
143 .start = DMACH_SPI1_TX,
144 .end = DMACH_SPI1_TX,
145 .flags = IORESOURCE_DMA,
148 .start = DMACH_SPI1_RX,
149 .end = DMACH_SPI1_RX,
150 .flags = IORESOURCE_DMA,
155 .flags = IORESOURCE_IRQ,
159 static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
160 .cfg_gpio = s5p6440_spi_cfg_gpio,
161 .fifo_lvl_mask = 0x7f,
165 static struct s3c64xx_spi_info s5p6450_spi1_pdata = {
166 .cfg_gpio = s5p6450_spi_cfg_gpio,
167 .fifo_lvl_mask = 0x7f,
171 struct platform_device s5p64x0_device_spi1 = {
172 .name = "s3c64xx-spi",
174 .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
175 .resource = s5p64x0_spi1_resource,
177 .dma_mask = &spi_dmamask,
178 .coherent_dma_mask = DMA_BIT_MASK(32),
182 void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
185 struct s3c64xx_spi_info *pd;
187 id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000;
189 /* Reject invalid configuration */
190 if (!num_cs || src_clk_nr < 0
191 || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {
192 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
199 pd = &s5p6450_spi0_pdata;
201 pd = &s5p6440_spi0_pdata;
203 s5p64x0_device_spi0.dev.platform_data = pd;
207 pd = &s5p6450_spi1_pdata;
209 pd = &s5p6440_spi1_pdata;
211 s5p64x0_device_spi1.dev.platform_data = pd;
214 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
220 pd->src_clk_nr = src_clk_nr;
221 pd->src_clk_name = s5p64x0_spi_src_clks[src_clk_nr];