1 /* linux/arch/arm/mach-s5pc100/dev-spi.c
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/platform_device.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/gpio.h>
17 #include <mach/spi-clocks.h>
19 #include <plat/s3c64xx-spi.h>
20 #include <plat/gpio-cfg.h>
21 #include <plat/irqs.h>
23 static char *spi_src_clks[] = {
24 [S5PC100_SPI_SRCCLK_PCLK] = "pclk",
25 [S5PC100_SPI_SRCCLK_48M] = "spi_48m",
26 [S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus",
29 /* SPI Controller platform_devices */
31 /* Since we emulate multi-cs capability, we do not touch the CS.
32 * The emulated CS is toggled by board specific mechanism, as it can
33 * be either some immediate GPIO or some signal out of some other
34 * chip in between ... or some yet another way.
35 * We simply do not assume anything about CS.
37 static int s5pc100_spi_cfg_gpio(struct platform_device *pdev)
41 s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
42 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
46 s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
47 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
51 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
52 s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
53 s3c_gpio_cfgall_range(S5PC100_GPB(2), 2,
54 S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
58 dev_err(&pdev->dev, "Invalid SPI Controller number!");
65 static struct resource s5pc100_spi0_resource[] = {
67 .start = S5PC100_PA_SPI0,
68 .end = S5PC100_PA_SPI0 + 0x100 - 1,
69 .flags = IORESOURCE_MEM,
72 .start = DMACH_SPI0_TX,
74 .flags = IORESOURCE_DMA,
77 .start = DMACH_SPI0_RX,
79 .flags = IORESOURCE_DMA,
84 .flags = IORESOURCE_IRQ,
88 static struct s3c64xx_spi_info s5pc100_spi0_pdata = {
89 .cfg_gpio = s5pc100_spi_cfg_gpio,
90 .fifo_lvl_mask = 0x7f,
95 static u64 spi_dmamask = DMA_BIT_MASK(32);
97 struct platform_device s5pc100_device_spi0 = {
98 .name = "s3c64xx-spi",
100 .num_resources = ARRAY_SIZE(s5pc100_spi0_resource),
101 .resource = s5pc100_spi0_resource,
103 .dma_mask = &spi_dmamask,
104 .coherent_dma_mask = DMA_BIT_MASK(32),
105 .platform_data = &s5pc100_spi0_pdata,
109 static struct resource s5pc100_spi1_resource[] = {
111 .start = S5PC100_PA_SPI1,
112 .end = S5PC100_PA_SPI1 + 0x100 - 1,
113 .flags = IORESOURCE_MEM,
116 .start = DMACH_SPI1_TX,
117 .end = DMACH_SPI1_TX,
118 .flags = IORESOURCE_DMA,
121 .start = DMACH_SPI1_RX,
122 .end = DMACH_SPI1_RX,
123 .flags = IORESOURCE_DMA,
128 .flags = IORESOURCE_IRQ,
132 static struct s3c64xx_spi_info s5pc100_spi1_pdata = {
133 .cfg_gpio = s5pc100_spi_cfg_gpio,
134 .fifo_lvl_mask = 0x7f,
139 struct platform_device s5pc100_device_spi1 = {
140 .name = "s3c64xx-spi",
142 .num_resources = ARRAY_SIZE(s5pc100_spi1_resource),
143 .resource = s5pc100_spi1_resource,
145 .dma_mask = &spi_dmamask,
146 .coherent_dma_mask = DMA_BIT_MASK(32),
147 .platform_data = &s5pc100_spi1_pdata,
151 static struct resource s5pc100_spi2_resource[] = {
153 .start = S5PC100_PA_SPI2,
154 .end = S5PC100_PA_SPI2 + 0x100 - 1,
155 .flags = IORESOURCE_MEM,
158 .start = DMACH_SPI2_TX,
159 .end = DMACH_SPI2_TX,
160 .flags = IORESOURCE_DMA,
163 .start = DMACH_SPI2_RX,
164 .end = DMACH_SPI2_RX,
165 .flags = IORESOURCE_DMA,
170 .flags = IORESOURCE_IRQ,
174 static struct s3c64xx_spi_info s5pc100_spi2_pdata = {
175 .cfg_gpio = s5pc100_spi_cfg_gpio,
176 .fifo_lvl_mask = 0x7f,
181 struct platform_device s5pc100_device_spi2 = {
182 .name = "s3c64xx-spi",
184 .num_resources = ARRAY_SIZE(s5pc100_spi2_resource),
185 .resource = s5pc100_spi2_resource,
187 .dma_mask = &spi_dmamask,
188 .coherent_dma_mask = DMA_BIT_MASK(32),
189 .platform_data = &s5pc100_spi2_pdata,
193 void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
195 struct s3c64xx_spi_info *pd;
197 /* Reject invalid configuration */
198 if (!num_cs || src_clk_nr < 0
199 || src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) {
200 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
206 pd = &s5pc100_spi0_pdata;
209 pd = &s5pc100_spi1_pdata;
212 pd = &s5pc100_spi2_pdata;
215 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
221 pd->src_clk_nr = src_clk_nr;
222 pd->src_clk_name = spi_src_clks[src_clk_nr];