1 /* linux/arch/arm/mach-s5pc100/include/mach/regs-clock.h
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * S5PC100 - Clock register definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __ASM_ARCH_REGS_CLOCK_H
14 #define __ASM_ARCH_REGS_CLOCK_H __FILE__
18 #define S5P_CLKREG(x) (S3C_VA_SYS + (x))
20 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
21 #define S5P_MPLL_LOCK S5P_CLKREG(0x04)
22 #define S5P_EPLL_LOCK S5P_CLKREG(0x08)
23 #define S5P_HPLL_LOCK S5P_CLKREG(0x0C)
25 #define S5P_APLL_CON S5P_CLKREG(0x100)
26 #define S5P_MPLL_CON S5P_CLKREG(0x104)
27 #define S5P_EPLL_CON S5P_CLKREG(0x108)
28 #define S5P_HPLL_CON S5P_CLKREG(0x10C)
30 #define S5P_CLK_SRC0 S5P_CLKREG(0x200)
31 #define S5P_CLK_SRC1 S5P_CLKREG(0x204)
32 #define S5P_CLK_SRC2 S5P_CLKREG(0x208)
33 #define S5P_CLK_SRC3 S5P_CLKREG(0x20C)
35 #define S5P_CLK_DIV0 S5P_CLKREG(0x300)
36 #define S5P_CLK_DIV1 S5P_CLKREG(0x304)
37 #define S5P_CLK_DIV2 S5P_CLKREG(0x308)
38 #define S5P_CLK_DIV3 S5P_CLKREG(0x30C)
39 #define S5P_CLK_DIV4 S5P_CLKREG(0x310)
41 #define S5P_CLK_OUT S5P_CLKREG(0x400)
43 #define S5P_CLKGATE_D00 S5P_CLKREG(0x500)
44 #define S5P_CLKGATE_D01 S5P_CLKREG(0x504)
45 #define S5P_CLKGATE_D02 S5P_CLKREG(0x508)
47 #define S5P_CLKGATE_D10 S5P_CLKREG(0x520)
48 #define S5P_CLKGATE_D11 S5P_CLKREG(0x524)
49 #define S5P_CLKGATE_D12 S5P_CLKREG(0x528)
50 #define S5P_CLKGATE_D13 S5P_CLKREG(0x52C)
51 #define S5P_CLKGATE_D14 S5P_CLKREG(0x530)
52 #define S5P_CLKGATE_D15 S5P_CLKREG(0x534)
54 #define S5P_CLKGATE_D20 S5P_CLKREG(0x540)
56 #define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x560)
57 #define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x564)
60 #define S5P_CLKDIV0_D0_MASK (0x7<<8)
61 #define S5P_CLKDIV0_D0_SHIFT (8)
62 #define S5P_CLKDIV0_PCLKD0_MASK (0x7<<12)
63 #define S5P_CLKDIV0_PCLKD0_SHIFT (12)
66 #define S5P_CLKDIV1_D1_MASK (0x7<<12)
67 #define S5P_CLKDIV1_D1_SHIFT (12)
68 #define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16)
69 #define S5P_CLKDIV1_PCLKD1_SHIFT (16)
71 #endif /* __ASM_ARCH_REGS_CLOCK_H */