1 /* linux/arch/arm/mach-s5pv310/cpu.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/sched.h>
12 #include <linux/sysdev.h>
14 #include <asm/mach/map.h>
15 #include <asm/mach/irq.h>
17 #include <asm/proc-fns.h>
18 #include <asm/hardware/cache-l2x0.h>
21 #include <plat/clock.h>
22 #include <plat/s5pv310.h>
23 #include <plat/sdhci.h>
25 #include <mach/regs-irq.h>
27 extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
28 unsigned int irq_start);
29 extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
31 /* Initial IO mappings */
32 static struct map_desc s5pv310_iodesc[] __initdata = {
34 .virtual = (unsigned long)S5P_VA_SYSRAM,
35 .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
39 .virtual = (unsigned long)S5P_VA_CMU,
40 .pfn = __phys_to_pfn(S5PV310_PA_CMU),
44 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
45 .pfn = __phys_to_pfn(S5PV310_PA_COMBINER),
49 .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
50 .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
54 .virtual = (unsigned long)S5P_VA_L2CC,
55 .pfn = __phys_to_pfn(S5PV310_PA_L2CC),
59 .virtual = (unsigned long)S5P_VA_GPIO1,
60 .pfn = __phys_to_pfn(S5PV310_PA_GPIO1),
64 .virtual = (unsigned long)S5P_VA_GPIO2,
65 .pfn = __phys_to_pfn(S5PV310_PA_GPIO2),
69 .virtual = (unsigned long)S5P_VA_GPIO3,
70 .pfn = __phys_to_pfn(S5PV310_PA_GPIO3),
74 .virtual = (unsigned long)S3C_VA_UART,
75 .pfn = __phys_to_pfn(S3C_PA_UART),
79 .virtual = (unsigned long)S5P_VA_SROMC,
80 .pfn = __phys_to_pfn(S5PV310_PA_SROMC),
86 static void s5pv310_idle(void)
96 * register the standard cpu IO areas
98 void __init s5pv310_map_io(void)
100 iotable_init(s5pv310_iodesc, ARRAY_SIZE(s5pv310_iodesc));
102 /* initialize device information early */
103 s5pv310_default_sdhci0();
104 s5pv310_default_sdhci1();
105 s5pv310_default_sdhci2();
106 s5pv310_default_sdhci3();
109 void __init s5pv310_init_clocks(int xtal)
111 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
113 s3c24xx_register_baseclocks(xtal);
114 s5p_register_clocks(xtal);
115 s5pv310_register_clocks();
116 s5pv310_setup_clocks();
119 void __init s5pv310_init_irq(void)
123 gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
125 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
126 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
127 COMBINER_IRQ(irq, 0));
128 combiner_cascade_irq(irq, IRQ_SPI(irq));
131 /* The parameters of s5p_init_irq() are for VIC init.
132 * Theses parameters should be NULL and 0 because S5PV310
133 * uses GIC instead of VIC.
135 s5p_init_irq(NULL, 0);
138 struct sysdev_class s5pv310_sysclass = {
139 .name = "s5pv310-core",
142 static struct sys_device s5pv310_sysdev = {
143 .cls = &s5pv310_sysclass,
146 static int __init s5pv310_core_init(void)
148 return sysdev_class_register(&s5pv310_sysclass);
151 core_initcall(s5pv310_core_init);
153 #ifdef CONFIG_CACHE_L2X0
154 static int __init s5pv310_l2x0_cache_init(void)
156 /* TAG, Data Latency Control: 2cycle */
157 __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
158 __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
160 /* L2X0 Prefetch Control */
161 __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
163 /* L2X0 Power Control */
164 __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
165 S5P_VA_L2CC + L2X0_POWER_CTRL);
167 l2x0_init(S5P_VA_L2CC, 0x7C070001, 0xC200ffff);
172 early_initcall(s5pv310_l2x0_cache_init);
175 int __init s5pv310_init(void)
177 printk(KERN_INFO "S5PV310: Initializing architecture\n");
179 /* set idle function */
180 pm_idle = s5pv310_idle;
182 return sysdev_register(&s5pv310_sysdev);