arch/arm/mach-s5pv310/mach-smdkv310.c

   1 /* linux/arch/arm/mach-s5pv310/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/gpio.h>
  13 #include <linux/mmc/host.h>
  14 #include <linux/platform_device.h>
  15
  16 #include <asm/mach/arch.h>
  17 #include <asm/mach-types.h>
  18 #include <asm/hardware/cache-l2x0.h>
  19
  20 #include <plat/regs-serial.h>
  21 #include <plat/s5pv310.h>
  22 #include <plat/cpu.h>
  23 #include <plat/devs.h>
  24 #include <plat/sdhci.h>
  25
  26 #include <mach/map.h>
  27
  28 /* Following are default values for UCON, ULCON and UFCON UART registers */
  29 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  30                                  S3C2410_UCON_RXILEVEL |        \
  31                                  S3C2410_UCON_TXIRQMODE |       \
  32                                  S3C2410_UCON_RXIRQMODE |       \
  33                                  S3C2410_UCON_RXFIFO_TOI |      \
  34                                  S3C2443_UCON_RXERR_IRQEN)
  35
  36 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  37
  38 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  39                                  S5PV210_UFCON_TXTRIG4 |        \
  40                                  S5PV210_UFCON_RXTRIG4)
  41
  42 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  43         [0] = {
  44                 .hwport         = 0,
  45                 .flags          = 0,
  46                 .ucon           = SMDKV310_UCON_DEFAULT,
  47                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  48                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  49         },
  50         [1] = {
  51                 .hwport         = 1,
  52                 .flags          = 0,
  53                 .ucon           = SMDKV310_UCON_DEFAULT,
  54                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  55                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  56         },
  57         [2] = {
  58                 .hwport         = 2,
  59                 .flags          = 0,
  60                 .ucon           = SMDKV310_UCON_DEFAULT,
  61                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  62                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  63         },
  64         [3] = {
  65                 .hwport         = 3,
  66                 .flags          = 0,
  67                 .ucon           = SMDKV310_UCON_DEFAULT,
  68                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  69                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  70         },
  71 };
  72
  73 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  74         .cd_type                = S3C_SDHCI_CD_GPIO,
  75         .ext_cd_gpio            = S5PV310_GPK0(2),
  76         .ext_cd_gpio_invert     = 1,
  77         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  78 #ifdef CONFIG_S5PV310_SDHCI_CH0_8BIT
  79         .max_width              = 8,
  80         .host_caps              = MMC_CAP_8_BIT_DATA,
  81 #endif
  82 };
  83
  84 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  85         .cd_type                = S3C_SDHCI_CD_GPIO,
  86         .ext_cd_gpio            = S5PV310_GPK0(2),
  87         .ext_cd_gpio_invert     = 1,
  88         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  89 };
  90
  91 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
  92         .cd_type                = S3C_SDHCI_CD_GPIO,
  93         .ext_cd_gpio            = S5PV310_GPK2(2),
  94         .ext_cd_gpio_invert     = 1,
  95         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  96 #ifdef CONFIG_S5PV310_SDHCI_CH2_8BIT
  97         .max_width              = 8,
  98         .host_caps              = MMC_CAP_8_BIT_DATA,
  99 #endif
 100 };
 101
 102 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 103         .cd_type                = S3C_SDHCI_CD_GPIO,
 104         .ext_cd_gpio            = S5PV310_GPK2(2),
 105         .ext_cd_gpio_invert     = 1,
 106         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 107 };
 108
 109 static struct platform_device *smdkv310_devices[] __initdata = {
 110         &s3c_device_hsmmc0,
 111         &s3c_device_hsmmc1,
 112         &s3c_device_hsmmc2,
 113         &s3c_device_hsmmc3,
 114         &s3c_device_rtc,
 115         &s3c_device_wdt,
 116 };
 117
 118 static void __init smdkv310_map_io(void)
 119 {
 120         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 121         s3c24xx_init_clocks(24000000);
 122         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 123 }
 124
 125 static void __init smdkv310_machine_init(void)
 126 {
 127         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 128         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 129         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 130         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 131
 132 #ifdef CONFIG_CACHE_L2X0
 133         l2x0_init(S5P_VA_L2CC, 1 << 28, 0xffffffff);
 134 #endif
 135
 136         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 137 }
 138
 139 MACHINE_START(SMDKV310, "SMDKV310")
 140         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 141         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 142         .phys_io        = S3C_PA_UART & 0xfff00000,
 143         .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
 144         .boot_params    = S5P_PA_SDRAM + 0x100,
 145         .init_irq       = s5pv310_init_irq,
 146         .map_io         = smdkv310_map_io,
 147         .init_machine   = smdkv310_machine_init,
 148         .timer          = &s5pv310_timer,
 149 MACHINE_END