2 * linux/arch/arm/mach-sa1100/generic.c
4 * Author: Nicolas Pitre
6 * Code common to all SA11x0 machines.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/gpio.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
19 #include <linux/cpufreq.h>
20 #include <linux/ioport.h>
21 #include <linux/platform_device.h>
22 #include <linux/reboot.h>
24 #include <video/sa1100fb.h>
26 #include <asm/div64.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/flash.h>
30 #include <asm/system_misc.h>
32 #include <mach/hardware.h>
33 #include <mach/irqs.h>
37 unsigned int reset_status;
38 EXPORT_SYMBOL(reset_status);
43 * This table is setup for a 3.6864MHz Crystal.
45 struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
46 { .frequency = 59000, /* 59.0 MHz */},
47 { .frequency = 73700, /* 73.7 MHz */},
48 { .frequency = 88500, /* 88.5 MHz */},
49 { .frequency = 103200, /* 103.2 MHz */},
50 { .frequency = 118000, /* 118.0 MHz */},
51 { .frequency = 132700, /* 132.7 MHz */},
52 { .frequency = 147500, /* 147.5 MHz */},
53 { .frequency = 162200, /* 162.2 MHz */},
54 { .frequency = 176900, /* 176.9 MHz */},
55 { .frequency = 191700, /* 191.7 MHz */},
56 { .frequency = 206400, /* 206.4 MHz */},
57 { .frequency = 221200, /* 221.2 MHz */},
58 { .frequency = 235900, /* 235.9 MHz */},
59 { .frequency = 250700, /* 250.7 MHz */},
60 { .frequency = 265400, /* 265.4 MHz */},
61 { .frequency = 280200, /* 280.2 MHz */},
62 { .frequency = CPUFREQ_TABLE_END, },
66 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
70 for (i = 0; i < NR_FREQS; i++)
71 if (sa11x0_freq_table[i].frequency >= khz)
77 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
79 unsigned int freq = 0;
81 freq = sa11x0_freq_table[idx].frequency;
85 unsigned int sa11x0_getspeed(unsigned int cpu)
89 return sa11x0_freq_table[PPCR & 0xf].frequency;
93 * Default power-off for SA1100
95 static void sa1100_power_off(void)
99 /* disable internal oscillator, float CS lines */
100 PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
101 /* enable wake-up on GPIO0 (Assabet...) */
102 PWER = GFER = GRER = 1;
104 * set scratchpad to zero, just in case it is used as a
105 * restart address by the bootloader.
108 /* enter sleep mode */
112 void sa11x0_restart(enum reboot_mode mode, const char *cmd)
114 if (mode == REBOOT_SOFT) {
115 /* Jump into ROM at address 0 */
118 /* Use on-chip reset capability */
123 static void sa11x0_register_device(struct platform_device *dev, void *data)
126 dev->dev.platform_data = data;
127 err = platform_device_register(dev);
129 printk(KERN_ERR "Unable to register device %s: %d\n",
134 static struct resource sa11x0udc_resources[] = {
135 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
136 [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
139 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
141 static struct platform_device sa11x0udc_device = {
142 .name = "sa11x0-udc",
145 .dma_mask = &sa11x0udc_dma_mask,
146 .coherent_dma_mask = 0xffffffff,
148 .num_resources = ARRAY_SIZE(sa11x0udc_resources),
149 .resource = sa11x0udc_resources,
152 static struct resource sa11x0uart1_resources[] = {
153 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
154 [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
157 static struct platform_device sa11x0uart1_device = {
158 .name = "sa11x0-uart",
160 .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
161 .resource = sa11x0uart1_resources,
164 static struct resource sa11x0uart3_resources[] = {
165 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
166 [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
169 static struct platform_device sa11x0uart3_device = {
170 .name = "sa11x0-uart",
172 .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
173 .resource = sa11x0uart3_resources,
176 static struct resource sa11x0mcp_resources[] = {
177 [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
178 [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
179 [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
182 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
184 static struct platform_device sa11x0mcp_device = {
185 .name = "sa11x0-mcp",
188 .dma_mask = &sa11x0mcp_dma_mask,
189 .coherent_dma_mask = 0xffffffff,
191 .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
192 .resource = sa11x0mcp_resources,
195 void __init sa11x0_ppc_configure_mcp(void)
197 /* Setup the PPC unit for the MCP */
199 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
201 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
202 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
205 void sa11x0_register_mcp(struct mcp_plat_data *data)
207 sa11x0_register_device(&sa11x0mcp_device, data);
210 static struct resource sa11x0ssp_resources[] = {
211 [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
212 [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
215 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
217 static struct platform_device sa11x0ssp_device = {
218 .name = "sa11x0-ssp",
221 .dma_mask = &sa11x0ssp_dma_mask,
222 .coherent_dma_mask = 0xffffffff,
224 .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
225 .resource = sa11x0ssp_resources,
228 static struct resource sa11x0fb_resources[] = {
229 [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
230 [1] = DEFINE_RES_IRQ(IRQ_LCD),
233 static struct platform_device sa11x0fb_device = {
237 .coherent_dma_mask = 0xffffffff,
239 .num_resources = ARRAY_SIZE(sa11x0fb_resources),
240 .resource = sa11x0fb_resources,
243 void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
245 sa11x0_register_device(&sa11x0fb_device, inf);
248 static struct platform_device sa11x0pcmcia_device = {
249 .name = "sa11x0-pcmcia",
253 static struct platform_device sa11x0mtd_device = {
254 .name = "sa1100-mtd",
258 void sa11x0_register_mtd(struct flash_platform_data *flash,
259 struct resource *res, int nr)
261 flash->name = "sa1100";
262 sa11x0mtd_device.resource = res;
263 sa11x0mtd_device.num_resources = nr;
264 sa11x0_register_device(&sa11x0mtd_device, flash);
267 static struct resource sa11x0ir_resources[] = {
268 DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
269 DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
270 DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
271 DEFINE_RES_IRQ(IRQ_Ser2ICP),
274 static struct platform_device sa11x0ir_device = {
277 .num_resources = ARRAY_SIZE(sa11x0ir_resources),
278 .resource = sa11x0ir_resources,
281 void sa11x0_register_irda(struct irda_platform_data *irda)
283 sa11x0_register_device(&sa11x0ir_device, irda);
286 static struct resource sa1100_rtc_resources[] = {
287 DEFINE_RES_MEM(0x90010000, 0x40),
288 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
289 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
292 static struct platform_device sa11x0rtc_device = {
293 .name = "sa1100-rtc",
295 .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
296 .resource = sa1100_rtc_resources,
299 static struct resource sa11x0dma_resources[] = {
300 DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
301 DEFINE_RES_IRQ(IRQ_DMA0),
302 DEFINE_RES_IRQ(IRQ_DMA1),
303 DEFINE_RES_IRQ(IRQ_DMA2),
304 DEFINE_RES_IRQ(IRQ_DMA3),
305 DEFINE_RES_IRQ(IRQ_DMA4),
306 DEFINE_RES_IRQ(IRQ_DMA5),
309 static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
311 static struct platform_device sa11x0dma_device = {
312 .name = "sa11x0-dma",
315 .dma_mask = &sa11x0dma_dma_mask,
316 .coherent_dma_mask = 0xffffffff,
318 .num_resources = ARRAY_SIZE(sa11x0dma_resources),
319 .resource = sa11x0dma_resources,
322 static struct platform_device *sa11x0_devices[] __initdata = {
327 &sa11x0pcmcia_device,
332 static int __init sa1100_init(void)
334 pm_power_off = sa1100_power_off;
335 return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
338 arch_initcall(sa1100_init);
340 void __init sa11x0_init_late(void)
346 * Common I/O mapping:
348 * Typically, static virtual address mappings are as follow:
350 * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
351 * 0xf4000000-0xf4ffffff: SA-1111
352 * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
353 * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
354 * 0xffff0000-0xffff0fff: SA1100 exception vectors
355 * 0xffff2000-0xffff2fff: Minicache copy_user_page area
357 * Below 0xe8000000 is reserved for vm allocation.
359 * The machine specific code must provide the extra mapping beside the
360 * default mapping provided here.
363 static struct map_desc standard_io_desc[] __initdata = {
365 .virtual = 0xf8000000,
366 .pfn = __phys_to_pfn(0x80000000),
367 .length = 0x00100000,
370 .virtual = 0xfa000000,
371 .pfn = __phys_to_pfn(0x90000000),
372 .length = 0x00100000,
375 .virtual = 0xfc000000,
376 .pfn = __phys_to_pfn(0xa0000000),
377 .length = 0x00100000,
380 .virtual = 0xfe000000,
381 .pfn = __phys_to_pfn(0xb0000000),
382 .length = 0x00200000,
387 void __init sa1100_map_io(void)
389 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
393 * Disable the memory bus request/grant signals on the SA1110 to
394 * ensure that we don't receive spurious memory requests. We set
395 * the MBGNT signal false to ensure the SA1111 doesn't own the
398 void sa1110_mb_disable(void)
402 local_irq_save(flags);
406 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
408 GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
410 local_irq_restore(flags);
414 * If the system is going to use the SA-1111 DMA engines, set up
415 * the memory bus request/grant pins.
417 void sa1110_mb_enable(void)
421 local_irq_save(flags);
425 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
427 GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
430 local_irq_restore(flags);