2 * linux/arch/arm/mach-sa1100/time.c
4 * Copyright (C) 1998 Deborah Wallach.
5 * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com>
7 * 2000/03/29 (C) Nicolas Pitre <nico@fluxnic.net>
8 * Rewritten: big cleanup, much simpler, better HZ accuracy.
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/timex.h>
16 #include <linux/clockchips.h>
18 #include <asm/mach/time.h>
19 #include <mach/hardware.h>
21 #define MIN_OSCR_DELTA 2
23 static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
25 struct clock_event_device *c = dev_id;
27 /* Disarm the compare/match, signal the event. */
36 sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
38 unsigned long next, oscr;
45 return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
49 sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
52 case CLOCK_EVT_MODE_ONESHOT:
53 case CLOCK_EVT_MODE_UNUSED:
54 case CLOCK_EVT_MODE_SHUTDOWN:
59 case CLOCK_EVT_MODE_RESUME:
60 case CLOCK_EVT_MODE_PERIODIC:
65 static struct clock_event_device ckevt_sa1100_osmr0 = {
67 .features = CLOCK_EVT_FEAT_ONESHOT,
70 .set_next_event = sa1100_osmr0_set_next_event,
71 .set_mode = sa1100_osmr0_set_mode,
74 static cycle_t sa1100_read_oscr(struct clocksource *s)
79 static struct clocksource cksrc_sa1100_oscr = {
82 .read = sa1100_read_oscr,
83 .mask = CLOCKSOURCE_MASK(32),
85 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
88 static struct irqaction sa1100_timer_irq = {
90 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
91 .handler = sa1100_ost0_interrupt,
92 .dev_id = &ckevt_sa1100_osmr0,
95 static void __init sa1100_timer_init(void)
97 OIER = 0; /* disable any timer interrupts */
98 OSSR = 0xf; /* clear status on all timers */
100 ckevt_sa1100_osmr0.mult =
101 div_sc(3686400, NSEC_PER_SEC, ckevt_sa1100_osmr0.shift);
102 ckevt_sa1100_osmr0.max_delta_ns =
103 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
104 ckevt_sa1100_osmr0.min_delta_ns =
105 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
106 ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
108 cksrc_sa1100_oscr.mult =
109 clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
111 setup_irq(IRQ_OST0, &sa1100_timer_irq);
113 clocksource_register(&cksrc_sa1100_oscr);
114 clockevents_register_device(&ckevt_sa1100_osmr0);
118 unsigned long osmr[4], oier;
120 static void sa1100_timer_suspend(void)
129 static void sa1100_timer_resume(void)
139 * OSMR0 is the system timer: make sure OSCR is sufficiently behind
141 OSCR = OSMR0 - LATCH;
144 #define sa1100_timer_suspend NULL
145 #define sa1100_timer_resume NULL
148 struct sys_timer sa1100_timer = {
149 .init = sa1100_timer_init,
150 .suspend = sa1100_timer_suspend,
151 .resume = sa1100_timer_resume,