4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/mfd/tmio.h>
22 #include <linux/mmc/host.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/pinctrl/machine.h>
25 #include <linux/platform_device.h>
26 #include <linux/regulator/fixed.h>
27 #include <linux/regulator/machine.h>
28 #include <linux/smsc911x.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi/flash.h>
31 #include <mach/common.h>
32 #include <mach/irqs.h>
33 #include <mach/r8a7778.h>
34 #include <asm/mach/arch.h>
37 * CN9(Upper side) SCIF/RCAN selection
44 /* Dummy supplies, where voltage doesn't matter */
45 static struct regulator_consumer_supply dummy_supplies[] = {
46 REGULATOR_SUPPLY("vddvario", "smsc911x"),
47 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
50 static struct smsc911x_platform_config smsc911x_data = {
51 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
52 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
53 .flags = SMSC911X_USE_32BIT,
54 .phy_interface = PHY_INTERFACE_MODE_MII,
57 static struct resource smsc911x_resources[] = {
58 DEFINE_RES_MEM(0x18300000, 0x1000),
59 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
63 static struct sh_mobile_sdhi_info sdhi0_info = {
64 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
65 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
66 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
69 static struct sh_eth_plat_data ether_platform_data __initdata = {
71 .edmac_endian = EDMAC_LITTLE_ENDIAN,
72 .register_type = SH_ETH_REG_FAST_RCAR,
73 .phy_interface = PHY_INTERFACE_MODE_RMII,
75 * Although the LINK signal is available on the board, it's connected to
76 * the link/activity LED output of the PHY, thus the link disappears and
77 * reappears after each packet. We'd be better off ignoring such signal
78 * and getting the link state from the PHY indirectly.
84 static struct i2c_board_info i2c0_devices[] = {
86 I2C_BOARD_INFO("rx8581", 0x51),
91 static struct mtd_partition m25p80_spi_flash_partitions[] = {
99 static struct flash_platform_data spi_flash_data = {
102 .parts = m25p80_spi_flash_partitions,
103 .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
106 static struct spi_board_info spi_board_info[] __initdata = {
108 .modalias = "m25p80",
109 .max_speed_hz = 104000000,
113 .platform_data = &spi_flash_data,
117 static const struct pinctrl_map bockw_pinctrl_map[] = {
119 PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7778",
120 "ether_rmii", "ether"),
122 PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
125 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
126 "scif0_data_a", "scif0"),
127 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
128 "scif0_ctrl", "scif0"),
130 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
134 #define FPGA 0x18200000
136 #define PFC 0xfffc0000
138 static void __init bockw_init(void)
142 r8a7778_clock_init();
143 r8a7778_init_irq_extpin(1);
144 r8a7778_add_standard_devices();
145 r8a7778_add_ether_device(ðer_platform_data);
146 r8a7778_add_i2c_device(0);
147 r8a7778_add_hspi_device(0);
149 i2c_register_board_info(0, i2c0_devices,
150 ARRAY_SIZE(i2c0_devices));
151 spi_register_board_info(spi_board_info,
152 ARRAY_SIZE(spi_board_info));
153 pinctrl_register_mappings(bockw_pinctrl_map,
154 ARRAY_SIZE(bockw_pinctrl_map));
155 r8a7778_pinmux_init();
158 base = ioremap_nocache(FPGA, SZ_1M);
163 * IRQ0/1 is cascaded interrupt from FPGA.
164 * it should be cared in the future
165 * Now, it is assuming IRQ0 was used only from SMSC.
167 u16 val = ioread16(base + IRQ0MR);
168 val &= ~(1 << 4); /* enable SMSC911x */
169 iowrite16(val, base + IRQ0MR);
172 regulator_register_fixed(0, dummy_supplies,
173 ARRAY_SIZE(dummy_supplies));
175 platform_device_register_resndata(
176 &platform_bus, "smsc911x", -1,
177 smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
178 &smsc911x_data, sizeof(smsc911x_data));
182 base = ioremap_nocache(PFC, 0x200);
187 * SDHI CD/WP pin needs pull-up
189 iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
192 r8a7778_sdhi_init(0, &sdhi0_info);
196 static const char *bockw_boards_compat_dt[] __initdata = {
201 DT_MACHINE_START(BOCKW_DT, "bockw")
202 .init_early = r8a7778_init_delay,
203 .init_irq = r8a7778_init_irq_dt,
204 .init_machine = bockw_init,
205 .init_time = shmobile_timer_init,
206 .dt_compat = bockw_boards_compat_dt,