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1 /*
2  * Bock-W board support
3  *
4  * Copyright (C) 2013  Renesas Solutions Corp.
5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; version 2 of the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  */
20
21 #include <linux/mfd/tmio.h>
22 #include <linux/mmc/host.h>
23 #include <linux/pinctrl/machine.h>
24 #include <linux/platform_device.h>
25 #include <linux/regulator/fixed.h>
26 #include <linux/regulator/machine.h>
27 #include <linux/smsc911x.h>
28 #include <mach/common.h>
29 #include <mach/irqs.h>
30 #include <mach/r8a7778.h>
31 #include <asm/mach/arch.h>
32
33 /*
34  *      CN9(Upper side) SCIF/RCAN selection
35  *
36  *              1,4     3,6
37  * SW40         SCIF    RCAN
38  * SW41         SCIF    RCAN
39  */
40
41 /* Dummy supplies, where voltage doesn't matter */
42 static struct regulator_consumer_supply dummy_supplies[] = {
43         REGULATOR_SUPPLY("vddvario", "smsc911x"),
44         REGULATOR_SUPPLY("vdd33a", "smsc911x"),
45 };
46
47 static struct smsc911x_platform_config smsc911x_data = {
48         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
49         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
50         .flags          = SMSC911X_USE_32BIT,
51         .phy_interface  = PHY_INTERFACE_MODE_MII,
52 };
53
54 static struct resource smsc911x_resources[] = {
55         DEFINE_RES_MEM(0x18300000, 0x1000),
56         DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
57 };
58
59 /* SDHI */
60 static struct sh_mobile_sdhi_info sdhi0_info = {
61         .tmio_caps      = MMC_CAP_SD_HIGHSPEED,
62         .tmio_ocr_mask  = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
63         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT,
64 };
65
66 static struct sh_eth_plat_data ether_platform_data __initdata = {
67         .phy            = 0x01,
68         .edmac_endian   = EDMAC_LITTLE_ENDIAN,
69         .register_type  = SH_ETH_REG_FAST_RCAR,
70         .phy_interface  = PHY_INTERFACE_MODE_RMII,
71         /*
72          * Although the LINK signal is available on the board, it's connected to
73          * the link/activity LED output of the PHY, thus the link disappears and
74          * reappears after each packet.  We'd be better off ignoring such signal
75          * and getting the link state from the PHY indirectly.
76          */
77         .no_ether_link  = 1,
78 };
79
80 static const struct pinctrl_map bockw_pinctrl_map[] = {
81         /* Ether */
82         PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7778",
83                                   "ether_rmii", "ether"),
84         /* SCIF0 */
85         PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
86                                   "scif0_data_a", "scif0"),
87         PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
88                                   "scif0_ctrl", "scif0"),
89         /* SDHI0 */
90         PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
91                                   "sdhi0", "sdhi0"),
92 };
93
94 #define FPGA    0x18200000
95 #define IRQ0MR  0x30
96 #define PFC     0xfffc0000
97 #define PUPR4   0x110
98 static void __init bockw_init(void)
99 {
100         void __iomem *base;
101
102         r8a7778_clock_init();
103         r8a7778_init_irq_extpin(1);
104         r8a7778_add_standard_devices();
105         r8a7778_add_ether_device(&ether_platform_data);
106
107         pinctrl_register_mappings(bockw_pinctrl_map,
108                                   ARRAY_SIZE(bockw_pinctrl_map));
109         r8a7778_pinmux_init();
110
111         /* for SMSC */
112         base = ioremap_nocache(FPGA, SZ_1M);
113         if (base) {
114                 /*
115                  * CAUTION
116                  *
117                  * IRQ0/1 is cascaded interrupt from FPGA.
118                  * it should be cared in the future
119                  * Now, it is assuming IRQ0 was used only from SMSC.
120                  */
121                 u16 val = ioread16(base + IRQ0MR);
122                 val &= ~(1 << 4); /* enable SMSC911x */
123                 iowrite16(val, base + IRQ0MR);
124                 iounmap(base);
125
126                 regulator_register_fixed(0, dummy_supplies,
127                                          ARRAY_SIZE(dummy_supplies));
128
129                 platform_device_register_resndata(
130                         &platform_bus, "smsc911x", -1,
131                         smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
132                         &smsc911x_data, sizeof(smsc911x_data));
133         }
134
135         /* for SDHI */
136         base = ioremap_nocache(PFC, 0x200);
137         if (base) {
138                 /*
139                  * FIXME
140                  *
141                  * SDHI CD/WP pin needs pull-up
142                  */
143                 iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
144                 iounmap(base);
145
146                 r8a7778_sdhi_init(0, &sdhi0_info);
147         }
148 }
149
150 static const char *bockw_boards_compat_dt[] __initdata = {
151         "renesas,bockw",
152         NULL,
153 };
154
155 DT_MACHINE_START(BOCKW_DT, "bockw")
156         .init_early     = r8a7778_init_delay,
157         .init_irq       = r8a7778_init_irq_dt,
158         .init_machine   = bockw_init,
159         .init_time      = shmobile_timer_init,
160         .dt_compat      = bockw_boards_compat_dt,
161 MACHINE_END