2 * KZM-A9-GT board support - Reference Device Tree Implementation
4 * Copyright (C) 2012 Horms Solutions Ltd.
6 * Based on board-kzm9g.c
7 * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 #include <linux/delay.h>
24 #include <linux/gpio.h>
26 #include <linux/irq.h>
27 #include <linux/irqchip.h>
28 #include <linux/input.h>
29 #include <linux/of_platform.h>
30 #include <linux/pinctrl/machine.h>
31 #include <linux/pinctrl/pinconf-generic.h>
32 #include <mach/sh73a0.h>
33 #include <mach/common.h>
34 #include <asm/hardware/cache-l2x0.h>
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
38 static unsigned long pin_pullup_conf[] = {
39 PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
42 static const struct pinctrl_map kzm_pinctrl_map[] = {
43 PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0",
46 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
47 "mmc0_data8_0", "mmc0"),
48 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
49 "mmc0_ctrl_0", "mmc0"),
50 PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
51 "PORT279", pin_pullup_conf),
52 PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
53 "mmc0_data8_0", pin_pullup_conf),
55 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
56 "scifa4_data", "scifa4"),
57 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
58 "scifa4_ctrl", "scifa4"),
60 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
61 "sdhi0_data4", "sdhi0"),
62 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
63 "sdhi0_ctrl", "sdhi0"),
64 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
66 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
69 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh73a0",
70 "sdhi2_data4", "sdhi2"),
71 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh73a0",
72 "sdhi2_ctrl", "sdhi2"),
75 static void __init kzm_init(void)
77 sh73a0_add_standard_devices_dt();
78 pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
82 gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON, NULL);
83 gpio_request_one(GPIO_PORT15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
85 gpio_request(GPIO_FN_SDHICLK2, NULL);
86 gpio_request_one(GPIO_PORT14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
88 #ifdef CONFIG_CACHE_L2X0
89 /* Early BRESP enable, Shared attribute override enable, 64K*8way */
90 l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
94 static void kzm9g_restart(char mode, const char *cmd)
96 #define RESCNT2 IOMEM(0xe6188020)
97 /* Do soft power on reset */
98 writel((1 << 31), RESCNT2);
101 static const char *kzm9g_boards_compat_dt[] __initdata = {
102 "renesas,kzm9g-reference",
106 /* Please note that the clock initialisation shcheme used in
107 * sh73a0_add_early_devices_dt() and sh73a0_add_standard_devices_dt()
108 * does not work with SMP as there is a yet to be resolved lock-up in
109 * workqueue initialisation.
111 * CONFIG_SMP should be disabled when using this code.
113 DT_MACHINE_START(KZM9G_DT, "kzm9g-reference")
114 .smp = smp_ops(sh73a0_smp_ops),
115 .map_io = sh73a0_map_io,
116 .init_early = sh73a0_init_delay,
117 .nr_irqs = NR_IRQS_LEGACY,
118 .init_irq = irqchip_init,
119 .init_machine = kzm_init,
120 .init_late = shmobile_init_late,
121 .init_time = shmobile_timer_init,
122 .restart = kzm9g_restart,
123 .dt_compat = kzm9g_boards_compat_dt,