2 * r8a7779 processor support
4 * Copyright (C) 2011, 2013 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 * Copyright (C) 2013 Cogent Embedded, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/of_platform.h>
26 #include <linux/platform_data/gpio-rcar.h>
27 #include <linux/platform_device.h>
28 #include <linux/delay.h>
29 #include <linux/input.h>
31 #include <linux/serial_sci.h>
32 #include <linux/sh_intc.h>
33 #include <linux/sh_timer.h>
34 #include <linux/dma-mapping.h>
35 #include <mach/hardware.h>
36 #include <mach/irqs.h>
37 #include <mach/r8a7779.h>
38 #include <mach/common.h>
39 #include <asm/mach-types.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/time.h>
42 #include <asm/mach/map.h>
43 #include <asm/hardware/cache-l2x0.h>
45 static struct map_desc r8a7779_io_desc[] __initdata = {
46 /* 2M entity map for 0xf0000000 (MPCORE) */
48 .virtual = 0xf0000000,
49 .pfn = __phys_to_pfn(0xf0000000),
51 .type = MT_DEVICE_NONSHARED
53 /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
55 .virtual = 0xfe000000,
56 .pfn = __phys_to_pfn(0xfe000000),
58 .type = MT_DEVICE_NONSHARED
62 void __init r8a7779_map_io(void)
64 iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
67 static struct resource r8a7779_pfc_resources[] = {
68 DEFINE_RES_MEM(0xfffc0000, 0x023c),
71 static struct platform_device r8a7779_pfc_device = {
72 .name = "pfc-r8a7779",
74 .resource = r8a7779_pfc_resources,
75 .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
78 #define R8A7779_GPIO(idx, npins) \
79 static struct resource r8a7779_gpio##idx##_resources[] = { \
80 DEFINE_RES_MEM(0xffc40000 + (0x1000 * (idx)), 0x002c), \
81 DEFINE_RES_IRQ(gic_iid(0xad + (idx))), \
84 static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \
85 .gpio_base = 32 * (idx), \
87 .number_of_pins = npins, \
88 .pctl_name = "pfc-r8a7779", \
91 static struct platform_device r8a7779_gpio##idx##_device = { \
92 .name = "gpio_rcar", \
94 .resource = r8a7779_gpio##idx##_resources, \
95 .num_resources = ARRAY_SIZE(r8a7779_gpio##idx##_resources), \
97 .platform_data = &r8a7779_gpio##idx##_platform_data, \
109 static struct platform_device *r8a7779_pinctrl_devices[] __initdata = {
111 &r8a7779_gpio0_device,
112 &r8a7779_gpio1_device,
113 &r8a7779_gpio2_device,
114 &r8a7779_gpio3_device,
115 &r8a7779_gpio4_device,
116 &r8a7779_gpio5_device,
117 &r8a7779_gpio6_device,
120 void __init r8a7779_pinmux_init(void)
122 platform_add_devices(r8a7779_pinctrl_devices,
123 ARRAY_SIZE(r8a7779_pinctrl_devices));
126 static struct plat_sci_port scif0_platform_data = {
127 .mapbase = 0xffe40000,
128 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
129 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
130 .scbrr_algo_id = SCBRR_ALGO_2,
132 .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)),
135 static struct platform_device scif0_device = {
139 .platform_data = &scif0_platform_data,
143 static struct plat_sci_port scif1_platform_data = {
144 .mapbase = 0xffe41000,
145 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
146 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
147 .scbrr_algo_id = SCBRR_ALGO_2,
149 .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)),
152 static struct platform_device scif1_device = {
156 .platform_data = &scif1_platform_data,
160 static struct plat_sci_port scif2_platform_data = {
161 .mapbase = 0xffe42000,
162 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
163 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
164 .scbrr_algo_id = SCBRR_ALGO_2,
166 .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)),
169 static struct platform_device scif2_device = {
173 .platform_data = &scif2_platform_data,
177 static struct plat_sci_port scif3_platform_data = {
178 .mapbase = 0xffe43000,
179 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
180 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
181 .scbrr_algo_id = SCBRR_ALGO_2,
183 .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)),
186 static struct platform_device scif3_device = {
190 .platform_data = &scif3_platform_data,
194 static struct plat_sci_port scif4_platform_data = {
195 .mapbase = 0xffe44000,
196 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
197 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
198 .scbrr_algo_id = SCBRR_ALGO_2,
200 .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)),
203 static struct platform_device scif4_device = {
207 .platform_data = &scif4_platform_data,
211 static struct plat_sci_port scif5_platform_data = {
212 .mapbase = 0xffe45000,
213 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
214 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
215 .scbrr_algo_id = SCBRR_ALGO_2,
217 .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)),
220 static struct platform_device scif5_device = {
224 .platform_data = &scif5_platform_data,
229 static struct sh_timer_config tmu00_platform_data = {
231 .channel_offset = 0x4,
233 .clockevent_rating = 200,
236 static struct resource tmu00_resources[] = {
241 .flags = IORESOURCE_MEM,
244 .start = gic_iid(0x40),
245 .flags = IORESOURCE_IRQ,
249 static struct platform_device tmu00_device = {
253 .platform_data = &tmu00_platform_data,
255 .resource = tmu00_resources,
256 .num_resources = ARRAY_SIZE(tmu00_resources),
259 static struct sh_timer_config tmu01_platform_data = {
261 .channel_offset = 0x10,
263 .clocksource_rating = 200,
266 static struct resource tmu01_resources[] = {
271 .flags = IORESOURCE_MEM,
274 .start = gic_iid(0x41),
275 .flags = IORESOURCE_IRQ,
279 static struct platform_device tmu01_device = {
283 .platform_data = &tmu01_platform_data,
285 .resource = tmu01_resources,
286 .num_resources = ARRAY_SIZE(tmu01_resources),
290 static struct resource rcar_i2c0_res[] = {
294 .flags = IORESOURCE_MEM,
296 .start = gic_iid(0x6f),
297 .flags = IORESOURCE_IRQ,
301 static struct platform_device i2c0_device = {
304 .resource = rcar_i2c0_res,
305 .num_resources = ARRAY_SIZE(rcar_i2c0_res),
308 static struct resource rcar_i2c1_res[] = {
312 .flags = IORESOURCE_MEM,
314 .start = gic_iid(0x72),
315 .flags = IORESOURCE_IRQ,
319 static struct platform_device i2c1_device = {
322 .resource = rcar_i2c1_res,
323 .num_resources = ARRAY_SIZE(rcar_i2c1_res),
326 static struct resource rcar_i2c2_res[] = {
330 .flags = IORESOURCE_MEM,
332 .start = gic_iid(0x70),
333 .flags = IORESOURCE_IRQ,
337 static struct platform_device i2c2_device = {
340 .resource = rcar_i2c2_res,
341 .num_resources = ARRAY_SIZE(rcar_i2c2_res),
344 static struct resource rcar_i2c3_res[] = {
348 .flags = IORESOURCE_MEM,
350 .start = gic_iid(0x71),
351 .flags = IORESOURCE_IRQ,
355 static struct platform_device i2c3_device = {
358 .resource = rcar_i2c3_res,
359 .num_resources = ARRAY_SIZE(rcar_i2c3_res),
362 static struct resource sata_resources[] = {
367 .flags = IORESOURCE_MEM,
370 .start = gic_iid(0x84),
371 .flags = IORESOURCE_IRQ,
375 static struct platform_device sata_device = {
378 .resource = sata_resources,
379 .num_resources = ARRAY_SIZE(sata_resources),
381 .dma_mask = &sata_device.dev.coherent_dma_mask,
382 .coherent_dma_mask = DMA_BIT_MASK(32),
387 static struct resource ether_resources[] = {
391 .flags = IORESOURCE_MEM,
393 .start = gic_iid(0xb4),
394 .flags = IORESOURCE_IRQ,
398 static struct platform_device *r8a7779_devices_dt[] __initdata = {
409 static struct platform_device *r8a7779_late_devices[] __initdata = {
417 void __init r8a7779_add_standard_devices(void)
419 #ifdef CONFIG_CACHE_L2X0
420 /* Early BRESP enable, Shared attribute override enable, 64K*16way */
421 l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
425 r8a7779_init_pm_domains();
427 platform_add_devices(r8a7779_devices_dt,
428 ARRAY_SIZE(r8a7779_devices_dt));
429 platform_add_devices(r8a7779_late_devices,
430 ARRAY_SIZE(r8a7779_late_devices));
433 void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
435 platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
437 ARRAY_SIZE(ether_resources),
438 pdata, sizeof(*pdata));
441 /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
442 void __init __weak r8a7779_register_twd(void) { }
444 void __init r8a7779_earlytimer_init(void)
446 r8a7779_clock_init();
447 shmobile_earlytimer_init();
448 r8a7779_register_twd();
451 void __init r8a7779_add_early_devices(void)
453 early_platform_add_devices(r8a7779_devices_dt,
454 ARRAY_SIZE(r8a7779_devices_dt));
456 /* Early serial console setup is not included here due to
457 * memory map collisions. The SCIF serial ports in r8a7779
458 * are difficult to entity map 1:1 due to collision with the
459 * virtual memory range used by the coherent DMA code on ARM.
461 * Anyone wanting to debug early can remove UPF_IOREMAP from
462 * the sh-sci serial console platform data, adjust mapbase
463 * to a static M:N virt:phys mapping that needs to be added to
464 * the mappings passed with iotable_init() above.
466 * Then add a call to shmobile_setup_console() from this function.
468 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
469 * command line in case of the marzen board.
474 void __init r8a7779_init_delay(void)
476 shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
479 static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
483 void __init r8a7779_add_standard_devices_dt(void)
485 /* clocks are setup late during boot in the case of DT */
486 r8a7779_clock_init();
488 platform_add_devices(r8a7779_devices_dt,
489 ARRAY_SIZE(r8a7779_devices_dt));
490 of_platform_populate(NULL, of_default_bus_match_table,
491 r8a7779_auxdata_lookup, NULL);
494 static const char *r8a7779_compat_dt[] __initdata = {
499 DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
500 .map_io = r8a7779_map_io,
501 .init_early = r8a7779_init_delay,
502 .nr_irqs = NR_IRQS_LEGACY,
503 .init_irq = r8a7779_init_irq_dt,
504 .init_machine = r8a7779_add_standard_devices_dt,
505 .init_time = shmobile_timer_init,
506 .dt_compat = r8a7779_compat_dt,
508 #endif /* CONFIG_USE_OF */