2 * r8a7790 processor support
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/irq.h>
22 #include <linux/kernel.h>
23 #include <linux/of_platform.h>
24 #include <linux/platform_data/gpio-rcar.h>
25 #include <linux/platform_data/irq-renesas-irqc.h>
26 #include <linux/serial_sci.h>
27 #include <linux/sh_timer.h>
28 #include <mach/common.h>
29 #include <mach/irqs.h>
30 #include <mach/r8a7790.h>
31 #include <asm/mach/arch.h>
33 static struct resource pfc_resources[] __initdata = {
34 DEFINE_RES_MEM(0xe6060000, 0x250),
37 #define R8A7790_GPIO(idx) \
38 static struct resource r8a7790_gpio##idx##_resources[] __initdata = { \
39 DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \
40 DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
43 static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data __initdata = { \
44 .gpio_base = 32 * (idx), \
46 .number_of_pins = 32, \
47 .pctl_name = "pfc-r8a7790", \
48 .has_both_edge_trigger = 1, \
58 #define r8a7790_register_gpio(idx) \
59 platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
60 r8a7790_gpio##idx##_resources, \
61 ARRAY_SIZE(r8a7790_gpio##idx##_resources), \
62 &r8a7790_gpio##idx##_platform_data, \
63 sizeof(r8a7790_gpio##idx##_platform_data))
65 void __init r8a7790_pinmux_init(void)
67 platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
68 ARRAY_SIZE(pfc_resources));
69 r8a7790_register_gpio(0);
70 r8a7790_register_gpio(1);
71 r8a7790_register_gpio(2);
72 r8a7790_register_gpio(3);
73 r8a7790_register_gpio(4);
74 r8a7790_register_gpio(5);
77 #define SCIF_COMMON(scif_type, baseaddr, irq) \
79 .mapbase = baseaddr, \
80 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
81 .irqs = SCIx_IRQ_MUXED(irq)
83 #define SCIFA_DATA(index, baseaddr, irq) \
85 SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
86 .scbrr_algo_id = SCBRR_ALGO_4, \
87 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
90 #define SCIFB_DATA(index, baseaddr, irq) \
92 SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
93 .scbrr_algo_id = SCBRR_ALGO_4, \
94 .scscr = SCSCR_RE | SCSCR_TE, \
97 #define SCIF_DATA(index, baseaddr, irq) \
99 SCIF_COMMON(PORT_SCIF, baseaddr, irq), \
100 .scbrr_algo_id = SCBRR_ALGO_2, \
101 .scscr = SCSCR_RE | SCSCR_TE, \
104 #define HSCIF_DATA(index, baseaddr, irq) \
106 SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \
107 .scbrr_algo_id = SCBRR_ALGO_6, \
108 .scscr = SCSCR_RE | SCSCR_TE, \
111 enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
114 static struct plat_sci_port scif[] __initdata = {
115 SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
116 SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
117 SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
118 SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
119 SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
120 SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
121 SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
122 SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
123 HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
124 HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
127 static inline void r8a7790_register_scif(int idx)
129 platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
130 sizeof(struct plat_sci_port));
133 static struct renesas_irqc_config irqc0_data __initdata = {
134 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
137 static struct resource irqc0_resources[] __initdata = {
138 DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
139 DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
140 DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
141 DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
142 DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
145 #define r8a7790_register_irqc(idx) \
146 platform_device_register_resndata(&platform_bus, "renesas_irqc", \
147 idx, irqc##idx##_resources, \
148 ARRAY_SIZE(irqc##idx##_resources), \
150 sizeof(struct renesas_irqc_config))
152 static struct resource thermal_resources[] __initdata = {
153 DEFINE_RES_MEM(0xe61f0000, 0x14),
154 DEFINE_RES_MEM(0xe61f0100, 0x38),
155 DEFINE_RES_IRQ(gic_spi(69)),
158 #define r8a7790_register_thermal() \
159 platform_device_register_simple("rcar_thermal", -1, \
161 ARRAY_SIZE(thermal_resources))
163 static struct sh_timer_config cmt00_platform_data = {
166 .clockevent_rating = 80,
169 static struct resource cmt00_resources[] = {
170 DEFINE_RES_MEM(0xffca0510, 0x0c),
171 DEFINE_RES_MEM(0xffca0500, 0x04),
172 DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
175 #define r8a7790_register_cmt(idx) \
176 platform_device_register_resndata(&platform_bus, "sh_cmt", \
177 idx, cmt##idx##_resources, \
178 ARRAY_SIZE(cmt##idx##_resources), \
179 &cmt##idx##_platform_data, \
180 sizeof(struct sh_timer_config))
182 void __init r8a7790_add_standard_devices(void)
184 r8a7790_register_scif(SCIFA0);
185 r8a7790_register_scif(SCIFA1);
186 r8a7790_register_scif(SCIFB0);
187 r8a7790_register_scif(SCIFB1);
188 r8a7790_register_scif(SCIFB2);
189 r8a7790_register_scif(SCIFA2);
190 r8a7790_register_scif(SCIF0);
191 r8a7790_register_scif(SCIF1);
192 r8a7790_register_scif(HSCIF0);
193 r8a7790_register_scif(HSCIF1);
194 r8a7790_register_irqc(0);
195 r8a7790_register_thermal();
196 r8a7790_register_cmt(00);
199 void __init r8a7790_timer_init(void)
203 /* make sure arch timer is started by setting bit 0 of CNTCT */
204 cntcr = ioremap(0xe6080000, PAGE_SIZE);
208 shmobile_timer_init();
213 static const char *r8a7790_boards_compat_dt[] __initdata = {
218 DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
219 .init_time = r8a7790_timer_init,
220 .dt_compat = r8a7790_boards_compat_dt,
222 #endif /* CONFIG_USE_OF */