2 * SMP support for R-Mobile / SH-Mobile - r8a7779 portion
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/smp.h>
23 #include <linux/spinlock.h>
25 #include <linux/delay.h>
26 #include <mach/common.h>
27 #include <mach/r8a7779.h>
28 #include <asm/smp_plat.h>
29 #include <asm/smp_scu.h>
30 #include <asm/smp_twd.h>
32 #define AVECR IOMEM(0xfe700040)
34 static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
35 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
36 .chan_bit = 1, /* ARM1 */
37 .isr_bit = 1, /* ARM1 */
40 static struct r8a7779_pm_ch r8a7779_ch_cpu2 = {
41 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
42 .chan_bit = 2, /* ARM2 */
43 .isr_bit = 2, /* ARM2 */
46 static struct r8a7779_pm_ch r8a7779_ch_cpu3 = {
47 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
48 .chan_bit = 3, /* ARM3 */
49 .isr_bit = 3, /* ARM3 */
52 static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = {
53 [1] = &r8a7779_ch_cpu1,
54 [2] = &r8a7779_ch_cpu2,
55 [3] = &r8a7779_ch_cpu3,
58 static void __iomem *scu_base_addr(void)
60 return (void __iomem *)0xf0000000;
63 static DEFINE_SPINLOCK(scu_lock);
64 static unsigned long tmp;
66 #ifdef CONFIG_HAVE_ARM_TWD
67 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
69 void __init r8a7779_register_twd(void)
71 twd_local_timer_register(&twd_local_timer);
75 static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
77 void __iomem *scu_base = scu_base_addr();
80 tmp = __raw_readl(scu_base + 8);
83 spin_unlock(&scu_lock);
85 /* disable cache coherency after releasing the lock */
86 __raw_writel(tmp, scu_base + 8);
89 static unsigned int __init r8a7779_get_core_count(void)
91 void __iomem *scu_base = scu_base_addr();
93 return scu_get_core_count(scu_base);
96 static int r8a7779_platform_cpu_kill(unsigned int cpu)
98 struct r8a7779_pm_ch *ch = NULL;
101 cpu = cpu_logical_map(cpu);
103 /* disable cache coherency */
104 modify_scu_cpu_psr(3 << (cpu * 8), 0);
106 if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
107 ch = r8a7779_ch_cpu[cpu];
110 ret = r8a7779_sysc_power_down(ch);
112 return ret ? ret : 1;
115 static int __maybe_unused r8a7779_cpu_kill(unsigned int cpu)
119 /* this function is running on another CPU than the offline target,
120 * here we need wait for shutdown code in platform_cpu_die() to
121 * finish before asking SoC-specific code to power off the CPU core.
123 for (k = 0; k < 1000; k++) {
124 if (shmobile_cpu_is_dead(cpu))
125 return r8a7779_platform_cpu_kill(cpu);
134 static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
136 struct r8a7779_pm_ch *ch = NULL;
139 cpu = cpu_logical_map(cpu);
141 /* enable cache coherency */
142 modify_scu_cpu_psr(0, 3 << (cpu * 8));
144 if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
145 ch = r8a7779_ch_cpu[cpu];
148 ret = r8a7779_sysc_power_up(ch);
153 static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
155 int cpu = cpu_logical_map(0);
157 scu_enable(scu_base_addr());
159 /* Map the reset vector (in headsmp.S) */
160 __raw_writel(__pa(shmobile_secondary_vector), AVECR);
162 /* enable cache coherency on CPU0 */
163 modify_scu_cpu_psr(0, 3 << (cpu * 8));
167 /* power off secondary CPUs */
168 r8a7779_platform_cpu_kill(1);
169 r8a7779_platform_cpu_kill(2);
170 r8a7779_platform_cpu_kill(3);
173 static void __init r8a7779_smp_init_cpus(void)
175 unsigned int ncores = r8a7779_get_core_count();
177 shmobile_smp_init_cpus(ncores);
180 struct smp_operations r8a7779_smp_ops __initdata = {
181 .smp_init_cpus = r8a7779_smp_init_cpus,
182 .smp_prepare_cpus = r8a7779_smp_prepare_cpus,
183 .smp_boot_secondary = r8a7779_boot_secondary,
184 #ifdef CONFIG_HOTPLUG_CPU
185 .cpu_kill = r8a7779_cpu_kill,
186 .cpu_die = shmobile_cpu_die,
187 .cpu_disable = shmobile_cpu_disable,