2 * arch/arm/mach-spear3xx/spear320.c
4 * SPEAr320 machine source file
6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #define pr_fmt(fmt) "SPEAr320: " fmt
16 #include <linux/amba/pl022.h>
17 #include <linux/amba/pl08x.h>
18 #include <linux/amba/serial.h>
19 #include <linux/irqchip.h>
20 #include <linux/of_platform.h>
21 #include <asm/mach/arch.h>
22 #include <asm/mach/map.h>
24 #include <mach/spear.h>
26 #define SPEAR320_UART1_BASE UL(0xA3000000)
27 #define SPEAR320_UART2_BASE UL(0xA4000000)
28 #define SPEAR320_SSP0_BASE UL(0xA5000000)
29 #define SPEAR320_SSP1_BASE UL(0xA6000000)
31 /* DMAC platform data's slave info */
32 struct pl08x_channel_data spear320_dma_info[] = {
38 .periph_buses = PL08X_AHB1,
44 .periph_buses = PL08X_AHB1,
50 .periph_buses = PL08X_AHB1,
56 .periph_buses = PL08X_AHB1,
62 .periph_buses = PL08X_AHB1,
68 .periph_buses = PL08X_AHB1,
74 .periph_buses = PL08X_AHB1,
80 .periph_buses = PL08X_AHB1,
86 .periph_buses = PL08X_AHB1,
88 .bus_id = "from_jpeg",
92 .periph_buses = PL08X_AHB1,
98 .periph_buses = PL08X_AHB2,
104 .periph_buses = PL08X_AHB2,
110 .periph_buses = PL08X_AHB2,
116 .periph_buses = PL08X_AHB2,
118 .bus_id = "uart1_rx",
122 .periph_buses = PL08X_AHB2,
124 .bus_id = "uart1_tx",
128 .periph_buses = PL08X_AHB2,
130 .bus_id = "uart2_rx",
134 .periph_buses = PL08X_AHB2,
136 .bus_id = "uart2_tx",
140 .periph_buses = PL08X_AHB2,
146 .periph_buses = PL08X_AHB2,
152 .periph_buses = PL08X_AHB2,
158 .periph_buses = PL08X_AHB2,
164 .periph_buses = PL08X_AHB2,
170 .periph_buses = PL08X_AHB2,
176 .periph_buses = PL08X_AHB2,
178 .bus_id = "rs485_rx",
182 .periph_buses = PL08X_AHB2,
184 .bus_id = "rs485_tx",
188 .periph_buses = PL08X_AHB2,
192 static struct pl022_ssp_controller spear320_ssp_data[] = {
196 .dma_filter = pl08x_filter_id,
197 .dma_tx_param = "ssp1_tx",
198 .dma_rx_param = "ssp1_rx",
203 .dma_filter = pl08x_filter_id,
204 .dma_tx_param = "ssp2_tx",
205 .dma_rx_param = "ssp2_rx",
210 static struct amba_pl011_data spear320_uart_data[] = {
212 .dma_filter = pl08x_filter_id,
213 .dma_tx_param = "uart1_tx",
214 .dma_rx_param = "uart1_rx",
216 .dma_filter = pl08x_filter_id,
217 .dma_tx_param = "uart2_tx",
218 .dma_rx_param = "uart2_rx",
222 /* Add SPEAr310 auxdata to pass platform data */
223 static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = {
224 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
226 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
228 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,
229 &spear320_ssp_data[0]),
230 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL,
231 &spear320_ssp_data[1]),
232 OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART1_BASE, NULL,
233 &spear320_uart_data[0]),
234 OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART2_BASE, NULL,
235 &spear320_uart_data[1]),
239 static void __init spear320_dt_init(void)
241 pl080_plat_data.slave_channels = spear320_dma_info;
242 pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear320_dma_info);
244 of_platform_populate(NULL, of_default_bus_match_table,
245 spear320_auxdata_lookup, NULL);
248 static const char * const spear320_dt_board_compat[] = {
255 struct map_desc spear320_io_desc[] __initdata = {
257 .virtual = (unsigned long)VA_SPEAR320_SOC_CONFIG_BASE,
258 .pfn = __phys_to_pfn(SPEAR320_SOC_CONFIG_BASE),
264 static void __init spear320_map_io(void)
266 iotable_init(spear320_io_desc, ARRAY_SIZE(spear320_io_desc));
270 DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree")
271 .map_io = spear320_map_io,
272 .init_irq = irqchip_init,
273 .init_time = spear3xx_timer_init,
274 .init_machine = spear320_dt_init,
275 .restart = spear_restart,
276 .dt_compat = spear320_dt_board_compat,