2 * Freescale STMP378X platform support
4 * Embedded Alley Solutions, Inc <source@embeddedalley.com>
6 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
7 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
11 * The code contained herein is licensed under the GNU General Public
12 * License. You may obtain a copy of the GNU General Public License
13 * Version 2 or later at the following locations:
15 * http://www.opensource.org/licenses/gpl-license.html
16 * http://www.gnu.org/copyleft/gpl.html
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/irq.h>
22 #include <linux/dma-mapping.h>
25 #include <asm/setup.h>
26 #include <asm/mach-types.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/irq.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/time.h>
33 #include <mach/pins.h>
34 #include <mach/pinmux.h>
36 #include <mach/hardware.h>
37 #include <mach/system.h>
38 #include <mach/platform.h>
39 #include <mach/stmp3xxx.h>
40 #include <mach/regs-icoll.h>
41 #include <mach/regs-apbh.h>
42 #include <mach/regs-apbx.h>
43 #include <mach/regs-pxp.h>
44 #include <mach/regs-i2c.h>
50 static void stmp378x_ack_irq(unsigned int irq)
52 /* Tell ICOLL to release IRQ line */
53 __raw_writel(0, REGS_ICOLL_BASE + HW_ICOLL_VECTOR);
55 /* ACK current interrupt */
56 __raw_writel(0x01 /* BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 */,
57 REGS_ICOLL_BASE + HW_ICOLL_LEVELACK);
60 (void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT);
63 static void stmp378x_mask_irq(unsigned int irq)
66 stmp3xxx_clearl(BM_ICOLL_INTERRUPTn_ENABLE,
67 REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10);
70 static void stmp378x_unmask_irq(unsigned int irq)
73 stmp3xxx_setl(BM_ICOLL_INTERRUPTn_ENABLE,
74 REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10);
77 static struct irq_chip stmp378x_chip = {
78 .ack = stmp378x_ack_irq,
79 .mask = stmp378x_mask_irq,
80 .unmask = stmp378x_unmask_irq,
83 void __init stmp378x_init_irq(void)
85 stmp3xxx_init_irq(&stmp378x_chip);
89 * DMA interrupt handling
91 void stmp3xxx_arch_dma_enable_interrupt(int channel)
93 void __iomem *c1, *c2;
95 switch (STMP3XXX_DMA_BUS(channel)) {
96 case STMP3XXX_BUS_APBH:
97 c1 = REGS_APBH_BASE + HW_APBH_CTRL1;
98 c2 = REGS_APBH_BASE + HW_APBH_CTRL2;
101 case STMP3XXX_BUS_APBX:
102 c1 = REGS_APBX_BASE + HW_APBX_CTRL1;
103 c2 = REGS_APBX_BASE + HW_APBX_CTRL2;
109 stmp3xxx_setl(1 << (16 + STMP3XXX_DMA_CHANNEL(channel)), c1);
110 stmp3xxx_setl(1 << (16 + STMP3XXX_DMA_CHANNEL(channel)), c2);
112 EXPORT_SYMBOL(stmp3xxx_arch_dma_enable_interrupt);
114 void stmp3xxx_arch_dma_clear_interrupt(int channel)
116 void __iomem *c1, *c2;
118 switch (STMP3XXX_DMA_BUS(channel)) {
119 case STMP3XXX_BUS_APBH:
120 c1 = REGS_APBH_BASE + HW_APBH_CTRL1;
121 c2 = REGS_APBH_BASE + HW_APBH_CTRL2;
124 case STMP3XXX_BUS_APBX:
125 c1 = REGS_APBX_BASE + HW_APBX_CTRL1;
126 c2 = REGS_APBX_BASE + HW_APBX_CTRL2;
132 stmp3xxx_clearl(1 << STMP3XXX_DMA_CHANNEL(channel), c1);
133 stmp3xxx_clearl(1 << STMP3XXX_DMA_CHANNEL(channel), c2);
135 EXPORT_SYMBOL(stmp3xxx_arch_dma_clear_interrupt);
137 int stmp3xxx_arch_dma_is_interrupt(int channel)
141 switch (STMP3XXX_DMA_BUS(channel)) {
142 case STMP3XXX_BUS_APBH:
143 r = __raw_readl(REGS_APBH_BASE + HW_APBH_CTRL1) &
144 (1 << STMP3XXX_DMA_CHANNEL(channel));
147 case STMP3XXX_BUS_APBX:
148 r = __raw_readl(REGS_APBX_BASE + HW_APBX_CTRL1) &
149 (1 << STMP3XXX_DMA_CHANNEL(channel));
154 EXPORT_SYMBOL(stmp3xxx_arch_dma_is_interrupt);
156 void stmp3xxx_arch_dma_reset_channel(int channel)
158 unsigned chbit = 1 << STMP3XXX_DMA_CHANNEL(channel);
162 switch (STMP3XXX_DMA_BUS(channel)) {
163 case STMP3XXX_BUS_APBH:
164 c0 = REGS_APBH_BASE + HW_APBH_CTRL0;
165 mask = chbit << BP_APBH_CTRL0_RESET_CHANNEL;
167 case STMP3XXX_BUS_APBX:
168 c0 = REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL;
169 mask = chbit << BP_APBX_CHANNEL_CTRL_RESET_CHANNEL;
175 /* Reset channel and wait for it to complete */
176 stmp3xxx_setl(mask, c0);
177 while (__raw_readl(c0) & mask)
180 EXPORT_SYMBOL(stmp3xxx_arch_dma_reset_channel);
182 void stmp3xxx_arch_dma_freeze(int channel)
184 unsigned chbit = 1 << STMP3XXX_DMA_CHANNEL(channel);
185 u32 mask = 1 << chbit;
187 switch (STMP3XXX_DMA_BUS(channel)) {
188 case STMP3XXX_BUS_APBH:
189 stmp3xxx_setl(mask, REGS_APBH_BASE + HW_APBH_CTRL0);
191 case STMP3XXX_BUS_APBX:
192 stmp3xxx_setl(mask, REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL);
196 EXPORT_SYMBOL(stmp3xxx_arch_dma_freeze);
198 void stmp3xxx_arch_dma_unfreeze(int channel)
200 unsigned chbit = 1 << STMP3XXX_DMA_CHANNEL(channel);
201 u32 mask = 1 << chbit;
203 switch (STMP3XXX_DMA_BUS(channel)) {
204 case STMP3XXX_BUS_APBH:
205 stmp3xxx_clearl(mask, REGS_APBH_BASE + HW_APBH_CTRL0);
207 case STMP3XXX_BUS_APBX:
208 stmp3xxx_clearl(mask, REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL);
212 EXPORT_SYMBOL(stmp3xxx_arch_dma_unfreeze);
215 * The registers are all very closely mapped, so we might as well map them all
216 * with a single mapping
219 * f0000000 80000000 On-chip registers
220 * f1000000 00000000 32k on-chip SRAM
223 static struct map_desc stmp378x_io_desc[] __initdata = {
225 .virtual = (u32)STMP3XXX_REGS_BASE,
226 .pfn = __phys_to_pfn(STMP3XXX_REGS_PHBASE),
227 .length = STMP3XXX_REGS_SIZE,
231 .virtual = (u32)STMP3XXX_OCRAM_BASE,
232 .pfn = __phys_to_pfn(STMP3XXX_OCRAM_PHBASE),
233 .length = STMP3XXX_OCRAM_SIZE,
239 static u64 common_dmamask = DMA_BIT_MASK(32);
242 * devices that are present only on stmp378x, not on all 3xxx boards:
246 static struct resource pxp_resource[] = {
248 .flags = IORESOURCE_MEM,
249 .start = REGS_PXP_PHYS,
250 .end = REGS_PXP_PHYS + REGS_PXP_SIZE,
252 .flags = IORESOURCE_IRQ,
258 struct platform_device stmp378x_pxp = {
259 .name = "stmp3xxx-pxp",
262 .dma_mask = &common_dmamask,
263 .coherent_dma_mask = DMA_BIT_MASK(32),
265 .num_resources = ARRAY_SIZE(pxp_resource),
266 .resource = pxp_resource,
269 static struct resource i2c_resources[] = {
271 .flags = IORESOURCE_IRQ,
272 .start = IRQ_I2C_ERROR,
273 .end = IRQ_I2C_ERROR,
275 .flags = IORESOURCE_MEM,
276 .start = REGS_I2C_PHYS,
277 .end = REGS_I2C_PHYS + REGS_I2C_SIZE,
279 .flags = IORESOURCE_DMA,
280 .start = STMP3XXX_DMA(3, STMP3XXX_BUS_APBX),
281 .end = STMP3XXX_DMA(3, STMP3XXX_BUS_APBX),
285 struct platform_device stmp378x_i2c = {
286 .name = "i2c_stmp3xxx",
289 .dma_mask = &common_dmamask,
290 .coherent_dma_mask = DMA_BIT_MASK(32),
292 .resource = i2c_resources,
293 .num_resources = ARRAY_SIZE(i2c_resources),
296 void __init stmp378x_map_io(void)
298 iotable_init(stmp378x_io_desc, ARRAY_SIZE(stmp378x_io_desc));