2 * nVidia Tegra device tree board support
4 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
5 * Copyright (C) 2010 Google, Inc.
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/serial_8250.h>
22 #include <linux/clk.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/irqdomain.h>
26 #include <linux/of_address.h>
27 #include <linux/of_fdt.h>
28 #include <linux/of_irq.h>
29 #include <linux/of_platform.h>
30 #include <linux/pda_power.h>
31 #include <linux/platform_data/tegra_usb.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/usb/tegra_usb_phy.h>
37 #include <asm/hardware/gic.h>
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/time.h>
41 #include <asm/setup.h>
43 #include <mach/iomap.h>
44 #include <mach/irqs.h>
49 struct tegra_ehci_platform_data tegra_ehci1_pdata = {
50 .operating_mode = TEGRA_USB_OTG,
51 .power_down_on_bus_suspend = 1,
55 struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
60 struct tegra_ehci_platform_data tegra_ehci2_pdata = {
61 .phy_config = &tegra_ehci2_ulpi_phy_config,
62 .operating_mode = TEGRA_USB_HOST,
63 .power_down_on_bus_suspend = 1,
67 struct tegra_ehci_platform_data tegra_ehci3_pdata = {
68 .operating_mode = TEGRA_USB_HOST,
69 .power_down_on_bus_suspend = 1,
73 struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
74 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
75 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
76 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
77 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
78 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
79 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
80 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
81 OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
82 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra20-i2s.0", NULL),
83 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra20-i2s.1", NULL),
84 OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra20-das", NULL),
85 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
87 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
89 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
91 OF_DEV_AUXDATA("nvidia,tegra20-apbdma", TEGRA_APB_DMA_BASE, "tegra-apbdma", NULL),
92 OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL),
96 static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
97 /* name parent rate enabled */
98 { "uarta", "pll_p", 216000000, true },
99 { "uartd", "pll_p", 216000000, true },
100 { "usbd", "clk_m", 12000000, false },
101 { "usb2", "clk_m", 12000000, false },
102 { "usb3", "clk_m", 12000000, false },
103 { "pll_a", "pll_p_out1", 56448000, true },
104 { "pll_a_out0", "pll_a", 11289600, true },
105 { "cdev1", NULL, 0, true },
106 { "i2s1", "pll_a_out0", 11289600, false},
107 { "i2s2", "pll_a_out0", 11289600, false},
111 static void __init tegra_dt_init(void)
113 tegra_clk_init_from_table(tegra_dt_clk_init_table);
116 * Finished with the static registrations now; fill in the missing
119 of_platform_populate(NULL, of_default_bus_match_table,
120 tegra20_auxdata_lookup, NULL);
123 static void __init trimslice_init(void)
125 #ifdef CONFIG_TEGRA_PCI
128 ret = tegra_pcie_init(true, true);
130 pr_err("tegra_pci_init() failed: %d\n", ret);
134 static void __init harmony_init(void)
136 #ifdef CONFIG_TEGRA_PCI
139 ret = harmony_pcie_init();
141 pr_err("harmony_pcie_init() failed: %d\n", ret);
145 static void __init paz00_init(void)
147 tegra_paz00_wifikill_init();
153 } board_init_funcs[] = {
154 { "compulab,trimslice", trimslice_init },
155 { "nvidia,harmony", harmony_init },
156 { "compal,paz00", paz00_init },
159 static void __init tegra_dt_init_late(void)
165 for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
166 if (of_machine_is_compatible(board_init_funcs[i].machine)) {
167 board_init_funcs[i].init();
173 static const char *tegra20_dt_board_compat[] = {
178 DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
179 .map_io = tegra_map_common_io,
180 .init_early = tegra20_init_early,
181 .init_irq = tegra_dt_init_irq,
182 .handle_irq = gic_handle_irq,
183 .timer = &tegra_timer,
184 .init_machine = tegra_dt_init,
185 .init_late = tegra_dt_init_late,
186 .restart = tegra_assert_system_reset,
187 .dt_compat = tegra20_dt_board_compat,