3 * Copyright (C) 2010 Google, Inc.
6 * Colin Cross <ccross@google.com>
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
19 #include <linux/kernel.h>
20 #include <linux/clk.h>
21 #include <linux/clkdev.h>
22 #include <linux/debugfs.h>
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/sched.h>
28 #include <linux/seq_file.h>
29 #include <linux/slab.h>
39 * Each struct clk has a spinlock.
41 * To avoid AB-BA locking problems, locks must always be traversed from child
42 * clock to parent clock. For example, when enabling a clock, the clock's lock
43 * is taken, and then clk_enable is called on the parent, which take's the
44 * parent clock's lock. There is one exceptions to this ordering: When dumping
45 * the clock tree through debugfs. In this case, clk_lock_all is called,
46 * which attemps to iterate through the entire list of clocks and take every
47 * clock lock. If any call to spin_trylock fails, all locked clocks are
48 * unlocked, and the process is retried. When all the locks are held,
49 * the only clock operation that can be called is clk_get_rate_all_locked.
51 * Within a single clock, no clock operation can call another clock operation
52 * on itself, except for clk_get_rate_locked and clk_set_rate_locked. Any
53 * clock operation can call any other clock operation on any of it's possible
56 * An additional mutex, clock_list_lock, is used to protect the list of all
59 * The clock operations must lock internally to protect against
60 * read-modify-write on registers that are shared by multiple clocks
62 static DEFINE_MUTEX(clock_list_lock);
63 static LIST_HEAD(clocks);
65 struct clk *tegra_get_clock_by_name(const char *name)
68 struct clk *ret = NULL;
69 mutex_lock(&clock_list_lock);
70 list_for_each_entry(c, &clocks, node) {
71 if (strcmp(c->name, name) == 0) {
76 mutex_unlock(&clock_list_lock);
80 /* Must be called with c->spinlock held */
81 static unsigned long clk_predict_rate_from_parent(struct clk *c, struct clk *p)
85 rate = clk_get_rate(p);
87 if (c->mul != 0 && c->div != 0) {
89 rate += c->div - 1; /* round up */
96 /* Must be called with c->spinlock held */
97 unsigned long clk_get_rate_locked(struct clk *c)
102 rate = clk_predict_rate_from_parent(c, c->parent);
109 unsigned long clk_get_rate(struct clk *c)
114 spin_lock_irqsave(&c->spinlock, flags);
116 rate = clk_get_rate_locked(c);
118 spin_unlock_irqrestore(&c->spinlock, flags);
122 EXPORT_SYMBOL(clk_get_rate);
124 int clk_reparent(struct clk *c, struct clk *parent)
130 void clk_init(struct clk *c)
132 spin_lock_init(&c->spinlock);
134 if (c->ops && c->ops->init)
137 if (!c->ops || !c->ops->enable) {
141 c->state = c->parent->state;
146 mutex_lock(&clock_list_lock);
147 list_add(&c->node, &clocks);
148 mutex_unlock(&clock_list_lock);
151 int clk_enable(struct clk *c)
156 spin_lock_irqsave(&c->spinlock, flags);
158 if (c->refcnt == 0) {
160 ret = clk_enable(c->parent);
165 if (c->ops && c->ops->enable) {
166 ret = c->ops->enable(c);
169 clk_disable(c->parent);
178 spin_unlock_irqrestore(&c->spinlock, flags);
181 EXPORT_SYMBOL(clk_enable);
183 void clk_disable(struct clk *c)
187 spin_lock_irqsave(&c->spinlock, flags);
189 if (c->refcnt == 0) {
190 WARN(1, "Attempting to disable clock %s with refcnt 0", c->name);
191 spin_unlock_irqrestore(&c->spinlock, flags);
194 if (c->refcnt == 1) {
195 if (c->ops && c->ops->disable)
199 clk_disable(c->parent);
205 spin_unlock_irqrestore(&c->spinlock, flags);
207 EXPORT_SYMBOL(clk_disable);
209 int clk_set_parent(struct clk *c, struct clk *parent)
213 unsigned long new_rate;
214 unsigned long old_rate;
216 spin_lock_irqsave(&c->spinlock, flags);
218 if (!c->ops || !c->ops->set_parent) {
223 new_rate = clk_predict_rate_from_parent(c, parent);
224 old_rate = clk_get_rate_locked(c);
226 ret = c->ops->set_parent(c, parent);
231 spin_unlock_irqrestore(&c->spinlock, flags);
234 EXPORT_SYMBOL(clk_set_parent);
236 struct clk *clk_get_parent(struct clk *c)
240 EXPORT_SYMBOL(clk_get_parent);
242 int clk_set_rate_locked(struct clk *c, unsigned long rate)
246 if (!c->ops || !c->ops->set_rate)
249 if (rate > c->max_rate)
252 if (c->ops && c->ops->round_rate) {
253 new_rate = c->ops->round_rate(c, rate);
261 return c->ops->set_rate(c, rate);
264 int clk_set_rate(struct clk *c, unsigned long rate)
269 spin_lock_irqsave(&c->spinlock, flags);
271 ret = clk_set_rate_locked(c, rate);
273 spin_unlock_irqrestore(&c->spinlock, flags);
277 EXPORT_SYMBOL(clk_set_rate);
280 /* Must be called with clocks lock and all indvidual clock locks held */
281 unsigned long clk_get_rate_all_locked(struct clk *c)
290 if (c->mul != 0 && c->div != 0) {
304 long clk_round_rate(struct clk *c, unsigned long rate)
309 spin_lock_irqsave(&c->spinlock, flags);
311 if (!c->ops || !c->ops->round_rate) {
316 if (rate > c->max_rate)
319 ret = c->ops->round_rate(c, rate);
322 spin_unlock_irqrestore(&c->spinlock, flags);
325 EXPORT_SYMBOL(clk_round_rate);
327 static int tegra_clk_init_one_from_table(struct tegra_clk_init_table *table)
334 c = tegra_get_clock_by_name(table->name);
337 pr_warning("Unable to initialize clock %s\n",
343 p = tegra_get_clock_by_name(table->parent);
345 pr_warning("Unable to find parent %s of clock %s\n",
346 table->parent, table->name);
350 if (c->parent != p) {
351 ret = clk_set_parent(c, p);
353 pr_warning("Unable to set parent %s of clock %s: %d\n",
354 table->parent, table->name, ret);
360 if (table->rate && table->rate != clk_get_rate(c)) {
361 ret = clk_set_rate(c, table->rate);
363 pr_warning("Unable to set clock %s to rate %lu: %d\n",
364 table->name, table->rate, ret);
369 if (table->enabled) {
372 pr_warning("Unable to enable clock %s: %d\n",
381 void tegra_clk_init_from_table(struct tegra_clk_init_table *table)
383 for (; table->name; table++)
384 tegra_clk_init_one_from_table(table);
386 EXPORT_SYMBOL(tegra_clk_init_from_table);
388 void tegra_periph_reset_deassert(struct clk *c)
390 tegra2_periph_reset_deassert(c);
392 EXPORT_SYMBOL(tegra_periph_reset_deassert);
394 void tegra_periph_reset_assert(struct clk *c)
396 tegra2_periph_reset_assert(c);
398 EXPORT_SYMBOL(tegra_periph_reset_assert);
400 void __init tegra_init_clock(void)
402 tegra2_init_clocks();
406 * The SDMMC controllers have extra bits in the clock source register that
407 * adjust the delay between the clock and data to compenstate for delays
410 void tegra_sdmmc_tap_delay(struct clk *c, int delay)
414 spin_lock_irqsave(&c->spinlock, flags);
415 tegra2_sdmmc_tap_delay(c, delay);
416 spin_unlock_irqrestore(&c->spinlock, flags);
419 #ifdef CONFIG_DEBUG_FS
421 static int __clk_lock_all_spinlocks(void)
425 list_for_each_entry(c, &clocks, node)
426 if (!spin_trylock(&c->spinlock))
427 goto unlock_spinlocks;
432 list_for_each_entry_continue_reverse(c, &clocks, node)
433 spin_unlock(&c->spinlock);
438 static void __clk_unlock_all_spinlocks(void)
442 list_for_each_entry_reverse(c, &clocks, node)
443 spin_unlock(&c->spinlock);
447 * This function retries until it can take all locks, and may take
448 * an arbitrarily long time to complete.
449 * Must be called with irqs enabled, returns with irqs disabled
450 * Must be called with clock_list_lock held
452 static void clk_lock_all(void)
458 ret = __clk_lock_all_spinlocks();
460 goto failed_spinlocks;
462 /* All locks taken successfully, return */
472 * Unlocks all clocks after a clk_lock_all
473 * Must be called with irqs disabled, returns with irqs enabled
474 * Must be called with clock_list_lock held
476 static void clk_unlock_all(void)
478 __clk_unlock_all_spinlocks();
483 static struct dentry *clk_debugfs_root;
486 static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level)
489 const char *state = "uninit";
494 else if (c->state == OFF)
497 if (c->mul != 0 && c->div != 0) {
498 if (c->mul > c->div) {
499 int mul = c->mul / c->div;
500 int mul2 = (c->mul * 10 / c->div) % 10;
501 int mul3 = (c->mul * 10) % c->div;
502 if (mul2 == 0 && mul3 == 0)
503 snprintf(div, sizeof(div), "x%d", mul);
505 snprintf(div, sizeof(div), "x%d.%d", mul, mul2);
507 snprintf(div, sizeof(div), "x%d.%d..", mul, mul2);
509 snprintf(div, sizeof(div), "%d%s", c->div / c->mul,
510 (c->div % c->mul) ? ".5" : "");
514 seq_printf(s, "%*s%c%c%-*s %-6s %-3d %-8s %-10lu\n",
516 c->rate > c->max_rate ? '!' : ' ',
518 30 - level * 3, c->name,
519 state, c->refcnt, div, clk_get_rate_all_locked(c));
521 list_for_each_entry(child, &clocks, node) {
522 if (child->parent != c)
525 clock_tree_show_one(s, child, level + 1);
529 static int clock_tree_show(struct seq_file *s, void *data)
532 seq_printf(s, " clock state ref div rate\n");
533 seq_printf(s, "--------------------------------------------------------------\n");
535 mutex_lock(&clock_list_lock);
539 list_for_each_entry(c, &clocks, node)
540 if (c->parent == NULL)
541 clock_tree_show_one(s, c, 0);
545 mutex_unlock(&clock_list_lock);
549 static int clock_tree_open(struct inode *inode, struct file *file)
551 return single_open(file, clock_tree_show, inode->i_private);
554 static const struct file_operations clock_tree_fops = {
555 .open = clock_tree_open,
558 .release = single_release,
561 static int possible_parents_show(struct seq_file *s, void *data)
563 struct clk *c = s->private;
566 for (i = 0; c->inputs[i].input; i++) {
567 char *first = (i == 0) ? "" : " ";
568 seq_printf(s, "%s%s", first, c->inputs[i].input->name);
574 static int possible_parents_open(struct inode *inode, struct file *file)
576 return single_open(file, possible_parents_show, inode->i_private);
579 static const struct file_operations possible_parents_fops = {
580 .open = possible_parents_open,
583 .release = single_release,
586 static int clk_debugfs_register_one(struct clk *c)
590 d = debugfs_create_dir(c->name, clk_debugfs_root);
595 d = debugfs_create_u8("refcnt", S_IRUGO, c->dent, (u8 *)&c->refcnt);
599 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
603 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
608 d = debugfs_create_file("possible_parents", S_IRUGO, c->dent,
609 c, &possible_parents_fops);
617 debugfs_remove_recursive(c->dent);
621 static int clk_debugfs_register(struct clk *c)
624 struct clk *pa = c->parent;
626 if (pa && !pa->dent) {
627 err = clk_debugfs_register(pa);
633 err = clk_debugfs_register_one(c);
640 static int __init clk_debugfs_init(void)
646 d = debugfs_create_dir("clock", NULL);
649 clk_debugfs_root = d;
651 d = debugfs_create_file("clock_tree", S_IRUGO, clk_debugfs_root, NULL,
656 list_for_each_entry(c, &clocks, node) {
657 err = clk_debugfs_register(c);
663 debugfs_remove_recursive(clk_debugfs_root);
667 late_initcall(clk_debugfs_init);