2 * Copyright (C) 2010,2011 Google, Inc.
5 * Colin Cross <ccross@android.com>
6 * Erik Gilling <ccross@android.com>
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
20 #include <linux/resource.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fsl_devices.h>
24 #include <linux/serial_8250.h>
26 #include <mach/irqs.h>
27 #include <mach/iomap.h>
30 static struct resource i2c_resource1[] = {
34 .flags = IORESOURCE_IRQ,
37 .start = TEGRA_I2C_BASE,
38 .end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
39 .flags = IORESOURCE_MEM,
43 static struct resource i2c_resource2[] = {
47 .flags = IORESOURCE_IRQ,
50 .start = TEGRA_I2C2_BASE,
51 .end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
52 .flags = IORESOURCE_MEM,
56 static struct resource i2c_resource3[] = {
60 .flags = IORESOURCE_IRQ,
63 .start = TEGRA_I2C3_BASE,
64 .end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
65 .flags = IORESOURCE_MEM,
69 static struct resource i2c_resource4[] = {
73 .flags = IORESOURCE_IRQ,
76 .start = TEGRA_DVC_BASE,
77 .end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
78 .flags = IORESOURCE_MEM,
82 struct platform_device tegra_i2c_device1 = {
85 .resource = i2c_resource1,
86 .num_resources = ARRAY_SIZE(i2c_resource1),
92 struct platform_device tegra_i2c_device2 = {
95 .resource = i2c_resource2,
96 .num_resources = ARRAY_SIZE(i2c_resource2),
102 struct platform_device tegra_i2c_device3 = {
105 .resource = i2c_resource3,
106 .num_resources = ARRAY_SIZE(i2c_resource3),
112 struct platform_device tegra_i2c_device4 = {
115 .resource = i2c_resource4,
116 .num_resources = ARRAY_SIZE(i2c_resource4),
122 static struct resource spi_resource1[] = {
124 .start = INT_S_LINK1,
126 .flags = IORESOURCE_IRQ,
129 .start = TEGRA_SPI1_BASE,
130 .end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
131 .flags = IORESOURCE_MEM,
135 static struct resource spi_resource2[] = {
139 .flags = IORESOURCE_IRQ,
142 .start = TEGRA_SPI2_BASE,
143 .end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
144 .flags = IORESOURCE_MEM,
148 static struct resource spi_resource3[] = {
152 .flags = IORESOURCE_IRQ,
155 .start = TEGRA_SPI3_BASE,
156 .end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
157 .flags = IORESOURCE_MEM,
161 static struct resource spi_resource4[] = {
165 .flags = IORESOURCE_IRQ,
168 .start = TEGRA_SPI4_BASE,
169 .end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
170 .flags = IORESOURCE_MEM,
174 struct platform_device tegra_spi_device1 = {
177 .resource = spi_resource1,
178 .num_resources = ARRAY_SIZE(spi_resource1),
180 .coherent_dma_mask = 0xffffffff,
184 struct platform_device tegra_spi_device2 = {
187 .resource = spi_resource2,
188 .num_resources = ARRAY_SIZE(spi_resource2),
190 .coherent_dma_mask = 0xffffffff,
194 struct platform_device tegra_spi_device3 = {
197 .resource = spi_resource3,
198 .num_resources = ARRAY_SIZE(spi_resource3),
200 .coherent_dma_mask = 0xffffffff,
204 struct platform_device tegra_spi_device4 = {
207 .resource = spi_resource4,
208 .num_resources = ARRAY_SIZE(spi_resource4),
210 .coherent_dma_mask = 0xffffffff,
215 static struct resource sdhci_resource1[] = {
219 .flags = IORESOURCE_IRQ,
222 .start = TEGRA_SDMMC1_BASE,
223 .end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
224 .flags = IORESOURCE_MEM,
228 static struct resource sdhci_resource2[] = {
232 .flags = IORESOURCE_IRQ,
235 .start = TEGRA_SDMMC2_BASE,
236 .end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
237 .flags = IORESOURCE_MEM,
241 static struct resource sdhci_resource3[] = {
245 .flags = IORESOURCE_IRQ,
248 .start = TEGRA_SDMMC3_BASE,
249 .end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
250 .flags = IORESOURCE_MEM,
254 static struct resource sdhci_resource4[] = {
258 .flags = IORESOURCE_IRQ,
261 .start = TEGRA_SDMMC4_BASE,
262 .end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
263 .flags = IORESOURCE_MEM,
267 /* board files should fill in platform_data register the devices themselvs.
268 * See board-harmony.c for an example
270 struct platform_device tegra_sdhci_device1 = {
271 .name = "sdhci-tegra",
273 .resource = sdhci_resource1,
274 .num_resources = ARRAY_SIZE(sdhci_resource1),
277 struct platform_device tegra_sdhci_device2 = {
278 .name = "sdhci-tegra",
280 .resource = sdhci_resource2,
281 .num_resources = ARRAY_SIZE(sdhci_resource2),
284 struct platform_device tegra_sdhci_device3 = {
285 .name = "sdhci-tegra",
287 .resource = sdhci_resource3,
288 .num_resources = ARRAY_SIZE(sdhci_resource3),
291 struct platform_device tegra_sdhci_device4 = {
292 .name = "sdhci-tegra",
294 .resource = sdhci_resource4,
295 .num_resources = ARRAY_SIZE(sdhci_resource4),
298 static struct resource tegra_usb1_resources[] = {
300 .start = TEGRA_USB_BASE,
301 .end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
302 .flags = IORESOURCE_MEM,
307 .flags = IORESOURCE_IRQ,
311 static struct resource tegra_usb2_resources[] = {
313 .start = TEGRA_USB2_BASE,
314 .end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
315 .flags = IORESOURCE_MEM,
320 .flags = IORESOURCE_IRQ,
324 static struct resource tegra_usb3_resources[] = {
326 .start = TEGRA_USB3_BASE,
327 .end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
328 .flags = IORESOURCE_MEM,
333 .flags = IORESOURCE_IRQ,
337 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
339 struct platform_device tegra_ehci1_device = {
340 .name = "tegra-ehci",
343 .dma_mask = &tegra_ehci_dmamask,
344 .coherent_dma_mask = DMA_BIT_MASK(32),
346 .resource = tegra_usb1_resources,
347 .num_resources = ARRAY_SIZE(tegra_usb1_resources),
350 struct platform_device tegra_ehci2_device = {
351 .name = "tegra-ehci",
354 .dma_mask = &tegra_ehci_dmamask,
355 .coherent_dma_mask = DMA_BIT_MASK(32),
357 .resource = tegra_usb2_resources,
358 .num_resources = ARRAY_SIZE(tegra_usb2_resources),
361 struct platform_device tegra_ehci3_device = {
362 .name = "tegra-ehci",
365 .dma_mask = &tegra_ehci_dmamask,
366 .coherent_dma_mask = DMA_BIT_MASK(32),
368 .resource = tegra_usb3_resources,
369 .num_resources = ARRAY_SIZE(tegra_usb3_resources),
372 static struct resource tegra_pmu_resources[] = {
374 .start = INT_CPU0_PMU_INTR,
375 .end = INT_CPU0_PMU_INTR,
376 .flags = IORESOURCE_IRQ,
379 .start = INT_CPU1_PMU_INTR,
380 .end = INT_CPU1_PMU_INTR,
381 .flags = IORESOURCE_IRQ,
385 struct platform_device tegra_pmu_device = {
387 .id = ARM_PMU_DEVICE_CPU,
388 .num_resources = ARRAY_SIZE(tegra_pmu_resources),
389 .resource = tegra_pmu_resources,
392 static struct resource tegra_uarta_resources[] = {
394 .start = TEGRA_UARTA_BASE,
395 .end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
396 .flags = IORESOURCE_MEM,
401 .flags = IORESOURCE_IRQ,
405 static struct resource tegra_uartb_resources[] = {
407 .start = TEGRA_UARTB_BASE,
408 .end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
409 .flags = IORESOURCE_MEM,
414 .flags = IORESOURCE_IRQ,
418 static struct resource tegra_uartc_resources[] = {
420 .start = TEGRA_UARTC_BASE,
421 .end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
422 .flags = IORESOURCE_MEM,
427 .flags = IORESOURCE_IRQ,
431 static struct resource tegra_uartd_resources[] = {
433 .start = TEGRA_UARTD_BASE,
434 .end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
435 .flags = IORESOURCE_MEM,
440 .flags = IORESOURCE_IRQ,
444 static struct resource tegra_uarte_resources[] = {
446 .start = TEGRA_UARTE_BASE,
447 .end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
448 .flags = IORESOURCE_MEM,
453 .flags = IORESOURCE_IRQ,
457 struct platform_device tegra_uarta_device = {
458 .name = "tegra_uart",
460 .num_resources = ARRAY_SIZE(tegra_uarta_resources),
461 .resource = tegra_uarta_resources,
463 .coherent_dma_mask = DMA_BIT_MASK(32),
467 struct platform_device tegra_uartb_device = {
468 .name = "tegra_uart",
470 .num_resources = ARRAY_SIZE(tegra_uartb_resources),
471 .resource = tegra_uartb_resources,
473 .coherent_dma_mask = DMA_BIT_MASK(32),
477 struct platform_device tegra_uartc_device = {
478 .name = "tegra_uart",
480 .num_resources = ARRAY_SIZE(tegra_uartc_resources),
481 .resource = tegra_uartc_resources,
483 .coherent_dma_mask = DMA_BIT_MASK(32),
487 struct platform_device tegra_uartd_device = {
488 .name = "tegra_uart",
490 .num_resources = ARRAY_SIZE(tegra_uartd_resources),
491 .resource = tegra_uartd_resources,
493 .coherent_dma_mask = DMA_BIT_MASK(32),
497 struct platform_device tegra_uarte_device = {
498 .name = "tegra_uart",
500 .num_resources = ARRAY_SIZE(tegra_uarte_resources),
501 .resource = tegra_uarte_resources,
503 .coherent_dma_mask = DMA_BIT_MASK(32),
507 static struct resource i2s_resource1[] = {
511 .flags = IORESOURCE_IRQ
514 .start = TEGRA_DMA_REQ_SEL_I2S_1,
515 .end = TEGRA_DMA_REQ_SEL_I2S_1,
516 .flags = IORESOURCE_DMA
519 .start = TEGRA_I2S1_BASE,
520 .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
521 .flags = IORESOURCE_MEM
525 static struct resource i2s_resource2[] = {
529 .flags = IORESOURCE_IRQ
532 .start = TEGRA_DMA_REQ_SEL_I2S2_1,
533 .end = TEGRA_DMA_REQ_SEL_I2S2_1,
534 .flags = IORESOURCE_DMA
537 .start = TEGRA_I2S2_BASE,
538 .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
539 .flags = IORESOURCE_MEM
543 struct platform_device tegra_i2s_device1 = {
546 .resource = i2s_resource1,
547 .num_resources = ARRAY_SIZE(i2s_resource1),
550 struct platform_device tegra_i2s_device2 = {
553 .resource = i2s_resource2,
554 .num_resources = ARRAY_SIZE(i2s_resource2),
557 static struct resource tegra_das_resources[] = {
559 .start = TEGRA_APB_MISC_DAS_BASE,
560 .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
561 .flags = IORESOURCE_MEM,
565 struct platform_device tegra_das_device = {
568 .num_resources = ARRAY_SIZE(tegra_das_resources),
569 .resource = tegra_das_resources,
572 struct platform_device tegra_pcm_device = {
573 .name = "tegra-pcm-audio",