2 * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 #ifndef __MACH_TEGRA_SLEEP_H
18 #define __MACH_TEGRA_SLEEP_H
20 #include <mach/iomap.h>
22 #define TEGRA_ARM_PERIF_VIRT (TEGRA_ARM_PERIF_BASE - IO_CPU_PHYS \
24 #define TEGRA_FLOW_CTRL_VIRT (TEGRA_FLOW_CTRL_BASE - IO_PPSB_PHYS \
26 #define TEGRA_CLK_RESET_VIRT (TEGRA_CLK_RESET_BASE - IO_PPSB_PHYS \
30 /* returns the offset of the flow controller halt register for a cpu */
31 .macro cpu_to_halt_reg rd, rcpu
34 movne \rd, \rd, lsl #3
39 /* returns the offset of the flow controller csr register for a cpu */
40 .macro cpu_to_csr_reg rd, rcpu
43 movne \rd, \rd, lsl #3
48 /* returns the ID of the current processor */
50 mrc p15, 0, \rd, c0, c0, 5
54 /* loads a 32-bit value into a register without a data access */
55 .macro mov32, reg, val
56 movw \reg, #:lower16:\val
57 movt \reg, #:upper16:\val
60 /* Macro to exit SMP coherency. */
61 .macro exit_smp, tmp1, tmp2
62 mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR
63 bic \tmp1, \tmp1, #(1<<6) | (1<<0) @ clear ACTLR.SMP | ACTLR.FW
64 mcr p15, 0, \tmp1, c1, c0, 1 @ ACTLR
67 mov \tmp1, \tmp1, lsl #2
69 mov \tmp2, \tmp2, lsl \tmp1
70 mov32 \tmp1, TEGRA_ARM_PERIF_VIRT + 0xC
71 str \tmp2, [\tmp1] @ invalidate SCU tags for CPU
76 #ifdef CONFIG_HOTPLUG_CPU
77 void tegra20_hotplug_init(void);
78 void tegra30_hotplug_init(void);
80 static inline void tegra20_hotplug_init(void) {}
81 static inline void tegra30_hotplug_init(void) {}