3 * arch/arm/mach-u300/include/mach/irqs.h
6 * Copyright (C) 2006-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * IRQ channel definitions for the U300 platforms.
9 * Author: Linus Walleij <linus.walleij@stericsson.com>
15 #define IRQ_U300_INTCON0_START 1
16 #define IRQ_U300_INTCON1_START 33
17 /* These are on INTCON0 - 30 lines */
18 #define IRQ_U300_IRQ0_EXT 1
19 #define IRQ_U300_IRQ1_EXT 2
20 #define IRQ_U300_DMA 3
21 #define IRQ_U300_VIDEO_ENC_0 4
22 #define IRQ_U300_VIDEO_ENC_1 5
23 #define IRQ_U300_AAIF_RX 6
24 #define IRQ_U300_AAIF_TX 7
25 #define IRQ_U300_AAIF_VGPIO 8
26 #define IRQ_U300_AAIF_WAKEUP 9
27 #define IRQ_U300_PCM_I2S0_FRAME 10
28 #define IRQ_U300_PCM_I2S0_FIFO 11
29 #define IRQ_U300_PCM_I2S1_FRAME 12
30 #define IRQ_U300_PCM_I2S1_FIFO 13
31 #define IRQ_U300_XGAM_GAMCON 14
32 #define IRQ_U300_XGAM_CDI 15
33 #define IRQ_U300_XGAM_CDICON 16
34 #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
35 /* MMIACC not used on the DB3210 or DB3350 chips */
36 #define IRQ_U300_XGAM_MMIACC 17
38 #define IRQ_U300_XGAM_PDI 18
39 #define IRQ_U300_XGAM_PDICON 19
40 #define IRQ_U300_XGAM_GAMEACC 20
41 #define IRQ_U300_XGAM_MCIDCT 21
42 #define IRQ_U300_APEX 22
43 #define IRQ_U300_UART0 23
44 #define IRQ_U300_SPI 24
45 #define IRQ_U300_TIMER_APP_OS 25
46 #define IRQ_U300_TIMER_APP_DD 26
47 #define IRQ_U300_TIMER_APP_GP1 27
48 #define IRQ_U300_TIMER_APP_GP2 28
49 #define IRQ_U300_TIMER_OS 29
50 #define IRQ_U300_TIMER_MS 30
51 #define IRQ_U300_KEYPAD_KEYBF 31
52 #define IRQ_U300_KEYPAD_KEYBR 32
53 /* These are on INTCON1 - 32 lines */
54 #define IRQ_U300_GPIO_PORT0 33
55 #define IRQ_U300_GPIO_PORT1 34
56 #define IRQ_U300_GPIO_PORT2 35
58 #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \
59 defined(CONFIG_MACH_U300_BS335)
60 /* These are for DB3150, DB3200 and DB3350 */
61 #define IRQ_U300_WDOG 36
62 #define IRQ_U300_EVHIST 37
63 #define IRQ_U300_MSPRO 38
64 #define IRQ_U300_MMCSD_MCIINTR0 39
65 #define IRQ_U300_MMCSD_MCIINTR1 40
66 #define IRQ_U300_I2C0 41
67 #define IRQ_U300_I2C1 42
68 #define IRQ_U300_RTC 43
69 #define IRQ_U300_NFIF 44
70 #define IRQ_U300_NFIF2 45
73 /* DB3150 and DB3200 have only 45 IRQs */
74 #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
75 #define U300_VIC_IRQS_END 46
78 /* The DB3350-specific interrupt lines */
79 #ifdef CONFIG_MACH_U300_BS335
80 #define IRQ_U300_ISP_F0 46
81 #define IRQ_U300_ISP_F1 47
82 #define IRQ_U300_ISP_F2 48
83 #define IRQ_U300_ISP_F3 49
84 #define IRQ_U300_ISP_F4 50
85 #define IRQ_U300_GPIO_PORT3 51
86 #define IRQ_U300_SYSCON_PLL_LOCK 52
87 #define IRQ_U300_UART1 53
88 #define IRQ_U300_GPIO_PORT4 54
89 #define IRQ_U300_GPIO_PORT5 55
90 #define IRQ_U300_GPIO_PORT6 56
91 #define U300_VIC_IRQS_END 57
94 /* The DB3210-specific interrupt lines */
95 #ifdef CONFIG_MACH_U300_BS365
96 #define IRQ_U300_GPIO_PORT3 36
97 #define IRQ_U300_GPIO_PORT4 37
98 #define IRQ_U300_WDOG 38
99 #define IRQ_U300_EVHIST 39
100 #define IRQ_U300_MSPRO 40
101 #define IRQ_U300_MMCSD_MCIINTR0 41
102 #define IRQ_U300_MMCSD_MCIINTR1 42
103 #define IRQ_U300_I2C0 43
104 #define IRQ_U300_I2C1 44
105 #define IRQ_U300_RTC 45
106 #define IRQ_U300_NFIF 46
107 #define IRQ_U300_NFIF2 47
108 #define IRQ_U300_SYSCON_PLL_LOCK 48
109 #define U300_VIC_IRQS_END 49
112 /* Maximum 8*7 GPIO lines */
113 #ifdef CONFIG_PINCTRL_COH901
114 #define IRQ_U300_GPIO_BASE (U300_VIC_IRQS_END)
115 #define IRQ_U300_GPIO_END (IRQ_U300_GPIO_BASE + 56)
117 #define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)
120 #define NR_IRQS (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)